STM32 Naming rules

Example: STM32 F 103 C 8 T 6

  1. Product family STM32= ARM based 32-bit microcontroller
  2. Product subseries
  • 101 = basic
  • 102=USB basic, USB2.0 full speed device
  • 103 = enhanced
  • 105 or 107= connected
  1. Pin number
  • T = 36 pins
  • C = 48 pins
  • R = 64 pin
  • V = 100 pin
  1. Flash memory capacity
  • 4 = 16 k bytes
  • 6 = 32 k bytes
  • 8 = 64 k bytes
  • C = 256 k bytes
  • D = 384 k bytes
  • E = 512 k bytes
  1. encapsulation
  • H=BGA
  • T=LQFP
  • U=VFQFPN
  • Y=WLCSP64
  1. Temperature range
  • 6= Industrial grade temperature range: -40℃~85℃
  • 7= Industrial grade temperature range: -40℃~105℃

GPIO

How GPIO works

  1. Four input modes
  • Input floating (GPIO_Mode_IN_FLOATING) : The level signal of the I/O port directly enters the input data register. That is, the level state of I/O is uncertain and completely determined by the external input; If the pin is suspended (in the case of no signal input), the reading level of the port is uncertain.

  • Input pull up (GPIO_Mode_IPU) : The level signal of the I/O port is directly entered into the input data register. However, when the I/O port is suspended (in the case of no signal input), the input level can be maintained at a high level; When the I/O port input is low, the input level is also low.

  • Input drop down (GPIO_Mode_IPD) : The level signal of the I/O port is directly entered into the input data register. However, when the I/O port is suspended (in the case of no signal input), the input level can be kept low; When the I/O port input is high, the input level is also high.

  • Analog input (GPIO_Mode_AIN) : The analog signal (voltage signal, not level signal) of the I/O port is directly analog input to the on-chip peripheral module, such as the ADC module, etc.

2. Four output modes

  • Open leakage output (GPIO_Mode_Out_OD) : Set/clear the value of the register or the output data register through the n-MOS tube, and finally output to the I/O port. Attention should be paid to the N-MOS tube here. When the output value is set to high level, the N-MOS tube is in the closed state. At this time, the level of THE I/O port will not be determined by the high or low level of the output, but by the external pull up or pull down of the I/O port. When the output value is set to low, the N-MOS tube is on, and the I/O port level is low. At the same time, the level of the I/O port can also be read through the input circuit; Note that the level of the I/O port is not necessarily the level of the output.

  • Open-drain multiplexing (GPIO_Mode_AF_OD) : This is very similar to open-drain output mode. The source of the high and low level of the output is determined by the reuse function output of the on-chip peripheral module instead of the CPU directly writing the output data register.

  • Push-pull output (GPIO_Mode_Out_PP) : The value of the set/clear register or the output data register is set through the P-MOS tube and n-MOS tube, and finally output to the I/O port. Attention should be paid to p-MOS tube and N-MOS tube. When the output value is set to high level, p-MOS tube is in the open state and N-MOS tube is in the closed state. At this time, the level of I/O port is determined by p-MOS tube: high level; When the output value is set to low level, p-MOS tube is in the off state and N-MOS tube is in the on state. At this time, the level of I/O port is determined by n-MOS tube: low level. At the same time, the level of the I/O port can also be read through the input circuit; Note that the I/O port level must be the output level.

  • Push-pull multiplexing (GPIO_Mode_AF_PP) : Very similar to the push-pull output mode. The source of the high and low level of the output is determined by the reuse function output of the on-chip peripheral module instead of the CPU directly writing the output data register.

  • The difference between open-drain output and push-pull output is that open-drain output can only output strong low level, while high level must be raised by external resistance. The output is equivalent to the collector of a triode. Suitable for current type drive, its ability to absorb current is relatively strong (generally within 20mA); Push pull output can output strong high and low levels, connected to digital devices.
  1. Three maximum turnover speeds: 2MHZ, 10MHZ and 50MHZ

GPIO configuration register

The registers for each group of GPIO ports include (to configure GPIO by group) :

  • Two 32-bit configuration registers (GPIOx_CRL, GPIOx_CRH)
  • Two 32-bit data registers (GPIOx_IDR, GPIOx_ODR)
  • One 32-bit set/Clear register (GPIOx_BSRR)
  • A 16-bit reset register (GPIOx_BRR)
  • A 32-bit lock register (GPIOx_LCKR)
  1. GPIOx_CRL, GPIOx_CRH

Each GPIO needs 4 bits to be configured, that is, a total of 4×16=64 bits, and one STM32 register is 32 bits, so two registers are needed to configure a set of GPIO. GPIOx_CRL is configured from 0 to 7, and GPIOx_CRH is configured from 8 to 15. For each GPIO, the middle and lower 2 bits of the 4 bits are configured for input or output, and the high 2 bits are configured for specific input/output modes. For example, in the lower two,

  • 00: input mode (state after reset)
  • 01: Output mode, maximum speed 10MHZ
  • 10: Output mode, maximum speed 2MHZ
  • 11: Output mode, maximum speed 50MHZ

In the high two digits, if it is in input mode,

  • 00: analog input
  • 01: float input (state after reset)
  • 10: Pull-up/pull-down input (specified by the GPIOx_ODR register)
  • 11: keep

In output mode,

  • 00: push pull output
  • 01: Open the leakage output
  • 10: multiplexed push-pull output
  • 11: reuse open leakage output
  1. GPIOx_IDR, GPIOx_ODR
  • GPIOx_IDR bit 31:16, always 0; Bit 15:0, corresponding to the input level of this set of 16 GPIO. These bits are read-only and can only be read in word (16-bit) form;
  • GPIOx_ODR bit 31:16, always 0; Bit 15:0, which controls the output level of this set of 16 GPIOs. If the value is set to 0, low level is output. If the value is set to 1, the output level is high. Operations can only be performed in word (16-bit) form.

In addition, when the I/O port is in input mode, the corresponding ODR is set to 0, and the input is pulled down. Set this parameter to 1. 3. GPIOx_BSRR GPIOx_BRR

  • GPIOx_BSRR bit 31:16, set one to 1, the corresponding ODR bit is 0 (bit is cleared); If the value is set to 0, the ODR median is not affected. Bit 15:0, set one to 1, the corresponding ODR is 1 (bit setting); If the value is set to 0, the ODR median is not affected.
  • GPIOx_BRR has the same high 16-bit function as BSRR (bit clearing)

GPIO related library functions

void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
Copy the code

A belt operation

Each bit is bloated (mapped) into a 32-bit word, and when the word is accessed, the bit is accessed. For example, the BSRR register has 32 bits, so it can be mapped to 32 addresses, and we access (read-read-write) these 32 addresses to access 32 bits. That is, if you want to rewrite a bit of a register, you can rewrite the mapped address of this bit and call the encapsulated related function, such as PBout(5)=1; Corresponding to the GPIOB – > the ODR | = 1 < < 5;

A link to the

  • STM32 Support package download address
  • STM32 Firmware library download address

The resources

  1. [STM32] GPIO working Principle (ultra detailed analysis of eight working modes, attached with circuit diagram)
  2. Teach you to learn STM32 microcontroller teaching video