The STM32 series is designed for embedded applications requiring high performance, low cost, and low power consumption with 32-bit MUCs in the ARM Cortex®-M0, M0+, M3, M4, and M7 cores. STM32 basic series, enhanced series, USB basic series, complementary series; The 72 MHz processing frequency of the enhanced series is followed. Memory includes 64KB to 256KB flash memory and 20KB to 64KB embedded SRAM. Three packages, LQFP64, LQFP100 and LFBGA100, are adopted. Different packages maintain the consistent pin arrangement. Combining with the design concept of STM32 platform, developers can re-optimize the function, memory, performance and pin number through product selection, and meet the personalized application requirements with the minimum hardware changes.
The following are the most common questions about STM32.
1, AHB system bus is divided into APB1 (36MHz) and APB2 (72MHz), where 2>1, meaning that APB2 connected to high-speed equipment
2, STM32F10X. h is equivalent to Reg52. h (which contains the basic bit-operation definitions), and the other one is STM32F10X_conf. h specifically controls the configuration of peripheral devices, that is, the role of the open-key file
3, HSE OSC (High Speed External Oscillator), generally 8MHz, HSI RC (High Speed internalRC), 8MHz
4, LSE OSC (Low Speed External Oscillator), typically 32.768 kHz, LSI RC (Low Speed internalRC), roughly 40 kHz, Provides a watchdog clock and an automatic wake-up unit clock source
5, SYSCLK clock source has three sources: HSI RC, HSE OSC, PLL
6, MCO[2:0] can provide 4 different sources of clock synchronization signal,PA8
7. The GPIO seems to have two diodes in reverse series as clamp diodes
8. The bus matrix uses rotation algorithm to arbitrate the system bus and DMA
9, ICODE bus, DCODE bus, system bus, DMA bus, bus matrix, AHB/APB bridge
10, Before using a peripheral, you must set the register RCC_AHBENR to turn on the clock of the peripheral.
Data bytes are stored in memory in the form of small endian storage.
12. The memory map is divided into 8 chunks of 512MB each
13, Flash page is 1K(small and medium capacity), high capacity is 2K
14, SystemMemory for ST company factory configuration locked, the user can not edit, used to reprogram the FLASH area. So we burn the program must select BOOT1 = 0, so through the embedded bootstrap program to burn the FLASH, such as the interrupt vector table and code.
15. Core voltage of STM32 is 1.8V
16, STM32 reset has three kinds: system reset, power reset, backup area reset. In addition to the reset flag in RCC_CSR and the lost value in BKP, all other registers are reset in the system. Trigger methods such as external reset, watchdog reset, software reset, etc. Power reset returns due to an external power on/off reset or standby mode. Reset except the register value in BKP is not moved, all other reset; The trigger source of backup area reset is software reset or when VDD and VBAT are all out of power.
17. After the MCU is reset, all I/O ports are in the floating input state
18, 68 maskable interrupt channels, 16 programmable priorities, 16 kernel interrupts, total 68+16=84 interrupts. The 103 series had only 60 interrupts, while the 107 series had 68
19. System startup starts from 0x00000004, 0x0000000 is reserved
NVIC nested vector Interrupt Controller can be divided into two kinds: preemptive priority (nesting) and Interrupt priority (sub-priority, not nesting). The two priorities are determined by four bits of binary. There are sixteen situations assigned:
21. Interrupts with preemptive priority 0 can interrupt any interrupt whose preemptive priority is not 0; Interrupts with preemptive priority number 1 can interrupt any interrupt with preemptive priority number 2, 3, or 4. … ; Constitutes interrupt nesting. If two interrupts have the same preemptive priority, the first one will respond to the first one, and no nesting will be formed. If they appear together (or hang around waiting), it depends on which of them has the higher subpriority, and if they have the same subpriority, it depends on their interrupt vector position. It turns out that the position of the interrupt vector is the final determinant
22. After power on initialization, AIRC is initialized to 0, with 16 preemptive priorities. However, since all external channel interrupt priority control word PRI_N is 0, preemptive priorities are the same, so they cannot be nested. The STM32 has proven one thing to the market with its product capabilities: the Cortex-M family of MCUs is a huge market. Due to the imbalance between supply and demand of the MCU, it is reasonable for this imbalance to lead to a 10-15% increase in the price of the MCU. This result will have a limited impact compared to the shutdown of the production line and the continuous switch of the production line. Domestic smart micro MM32 microcontroller can be compatible with the replacement of STM32 series, Yingshang Microelectronics support to provide product technical support and application solutions.