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Add register alias in ARM32

register The alias use
r0 a1 The first function argument and the function return value
r1 a2 The second function argument
r2 a3 The third function argument
r3 a4 The fourth function argument
r4 v1 Register variable
r5 v2 Register variable
r6 v3 Register variable
r7 v4 Register variable
r8 v5 Register variable
r9 v6 The register variable is the actual frame pointer
r10 sl Stack wiring
r11 fp Parameters of the pointer
r12 ip temporary
r13 sp The stack pointer
r14 lr Connection register
r15 pc Program counter

How to compile 16-bit ARM assembler instructions

AREA test, CODE code16 ; Declared as a 16-bit ARM directive the default is code32 END if not writtenCopy the code

Attached: instruction set summary

(1) ARM instruction set

1. Instruction format

2. Condition code

3. ARM memory access instruction

  1. LDR/ STR – Load/store instructions

  2. LDM/ STM – Multi-register load/store instructions

  3. SWP – Registers and memory switching instructions

4. ARM data processing instruction

  1. Data transfer instruction

A) MOV – Data transfer instruction

B) MVN – Data non-transmission instruction

  1. Arithmetic logic operation instruction

A) Add-addition operation instruction

B) Sub-subtraction operation instruction

C) RSB-reverse subtraction instruction

D) ADC – with carry addition instruction

E) SBC – with carry subtraction instruction

F) RSC – reverse subtraction instruction with carry

G) AND – logic “AND”

H) ORR – Logic “or”

I) EOR – Logic “xOR”

J) BIC – bit clearing instruction

  1. More instructions

A) CMP – comparison instruction

B) CMN – negative number comparison instruction

C) TST – bit test instruction

D) TEQ – Equality test instruction

  1. Multiplication instructions

A) MUL-32-bit multiplication instruction

B) MLA – 32 bit multiply plus instruction

C) UMULL – 64-bit unsigned multiplication instruction

D) UMlal-64 bit unsigned multiply instruction

E) SMULL – 64-bit signed multiplication instruction

F) SMLAL – 64 bit signed multiply instruction

5. ARM branch instruction

  1. B – Branch instruction

  2. BL – Branch instruction with connection

  3. BX – Branch instruction with state switching

6. ARM coprocessor instructions

  1. CDP – Coprocessor data manipulation instructions

  2. LDC – Coprocessor data read instruction

  3. STC – Coprocessor data write instruction

  4. Data transfer instructions from McR-arm processor to coprocessor

  5. MRC – Data transfer instructions from the COprocessor to the ARM processor

7. ARM miscellaneous instruction

  1. SWI – Soft interrupt instruction

  2. MRS – Read status register instruction

  3. MSR – Write status register instruction

8. ARM directive

  1. ADR – A small range of address read pseudoinstructions

  2. ADRL – Medium range address read pseudoinstruction

  3. LDR – Large range of address read pseudoinstructions

  4. NOP – Empty operation pseudoinstruction

(2) Thumb instruction set

1. Difference between Thumb instruction set and ARM instruction set

2. Thumb memory access instructions

  1. LDR/ STR – Load/store instructions

  2. PUSH/ POP – register on/off the stack instruction

  3. LDMIA/ STMIA – Multi-register load/store instructions

3. Thumb data processing instruction

  1. Data transfer instruction

A) MOV – Data transfer instruction

B) MVN – Data non-transmission instruction

C) NEG – Data take negative instruction

  1. Arithmetic logic operation instruction

A) Add-addition operation instruction

B) Sub-subtraction operation instruction

C) ADC – with carry addition instruction

D) SBC – with carry subtraction instruction

E) MUL – Multiplication operation instruction

F) AND – logic

G) ORR – Logic “or”

H) EOR – Logic “xOR”

I) BIC – bit clear instruction

J) ASR – Arithmetic right shift instruction

K) LSL – Logic left shift instruction

L) LSR – Logical right shift instruction

M) ROR – Loop right shift instruction

  1. More instructions

A) CMP – comparison instruction

B) CMN – negative number comparison instruction

C) TST – bit test instruction

4. Thumb branch instruction

  1. B – Branch instruction

  2. BL – Branch instruction with connection

  3. BX – Branch instruction with state switching

5. Thumb miscellaneous instruction

  1. SWI – Soft interrupt instruction

6. Thumb directive

  1. ADR – A small range of address read pseudoinstructions

  2. LDR – Large range of address read pseudoinstructions

  3. NOP – Empty operation pseudoinstruction