• This article has participated in the activity of “New person creation Ceremony”, and started the road of digging gold creation together.

Introduction to the

  • MS5182NThe chip is a 4 – channel 16 – bit remand technologySAR ADCChip, its object isADItheAD7682Chips, or basically both, could be used as home-grown alternatives. In addition theMS5189The opposite isAD7689. I only used it in this projectMS5182N. But just to make fun of it, their data book is really speechless, although there is obviously direct fromAD7682On copy come over of, however copy also can’t bear foot to see, I doubt its have to do detailed survey check. Because of that, I’ll just use it in the endAD7682Data sheet.

Chip operation

  • For software or driver developers, the first concern is how the bus operates, as well as understanding timing operations and register contents. The chip is(Q)SPIOf the interface.

Read and write operations

1. The chip has two states and three read and write data modes.

  • Including busy indicator
    • RDC (read/write during conversion) -> Fast host
    • RAC (read/write after conversion) -> any speed host
    • RSC (convert full read/write) -> any speed host
  • No busy indicator
    • RDC (read/write during conversion) -> Fast host
    • RAC (read/write after conversion) -> any speed host
    • RSC (convert full read/write) -> any speed host
2. Whether to use the busy indicator depends on the level operation state of CNV after conversion.
  • If the CNV is set high after the conversion, the busy indicator is disabled (not used).
  • If the CNV is pulled down after the conversion, the busy indicator is used.

Sequential interpretation of three read/write data modes

1.RDC (read/write during conversion)
  • Sequence diagram without busy indicator:
    • Note:
      • tCONV: indicates the writing time of the conversion command
      • tCYC: Conversion + data collection time
      • tDATA: Time to read data/conversion configuration instruction to send
  • fromSCKThe clock signal sequence diagram can be seen that the mode in which the transfer instructions are sent is required16 clockThat means every time you send a commandWrite two bytes consecutivelyInstruction data (becauseADCis16bit).
    • In the (POWER UP) After power-on, send (invalid configuration (xxx) convert command (also readn-2But because it was just powered on, it also read invalid conversion data.The real data is after the first valid instruction is configured for 2 reads.) after that, willCNVAfter a period of time when the busy indicator is not used, the data collection (ACQUISION) state, and then pull the CNV down for a period of time, the collection is finished, and thenCNVPull high, sendCFG(n)(Indicates the NTH configuration parameter) command, currently also read the first(n-2)Time to convert data, and so on.

    !!!!!!!!! Therefore, when reading data, you need to pay attention to when writing the current configuration parametersCFG(n)And at the same time receive2 times before CFG (n - 2)Issue transformation data under configuration instructions.

With this figure, the two conversions after power-on are meaningless (CONVERSION UNDEFINEED), the data is discarded directly.

2.RAC (read/write after conversion)
  • Sequence diagram without busy indicator:
    • Note:
      • tCONV: indicates the writing time of the conversion command
      • tCYC: Conversion + data collection time
      • tDATA: Time to read data/conversion configuration instruction to send
  • Compared to the aboveRDCMode, fromRACThe sequence diagram of the mode shows that after powering on (POWER UP), not during conversion (tCONV) to send configuration (also readThe first (n - 2)Configure instruction conversion data), but during collection (ACQUISION) send configuration, during conversion,CNVWhen the pin is pulled up, after passing (tCONV) after time, and then lower again.
3.RSC (full read/write conversion)
  • Sequence diagram without busy indicator:
    • Note:
      • tCONV: indicates the writing time of the conversion command
      • tCYC: Conversion + data collection time
      • tDATA: Time to read data/conversion configuration instruction to send
  • Compared to theRACMode, fromRSCThe timing diagram of the mode shows that its timing reads and writes are similar. After power-on (POWER UP), which is not during conversion (tCONV) to send configuration (also readThe first (n - 2)Configuration instruction conversion data), but the configuration is sent during collection, but after power-on (POWER UP) after entering the conversion period (tCONV),CNVThe pins are pulled up and then down, and are then collected before sending configuration instructions (reading data).ACQUISION) and convert the entire period, and it is to split the configuration instruction into two sends, each sending 8 bytes (fromSCKThe clock can see), and is collecting (ACQUISION) and the moment of conversion there is a CNV pull up and then pull down change. You can think of it asSPIthe8bitData read/write mode, while the front is SPI16bitRead/write mode.

Note: The above is the sequence without the busy indicator, but the one with the busy indicator is the same as the one with the busy indicator, except that the SCK of each mode has an extra clock (originally 16 SCKS, but the busy indicator has 17 SCKS). The sequence diagram with the busy indicator is shown below.

  • Sequence diagram with busy indicator: