This article has participated in the Denver Nuggets Creators Camp 3 “More Productive writing” track, see details: Digg project | creators Camp 3 ongoing, “write” personal impact.

Introduction to the

I2C communication protocol (Inter-Integrated Circuit) is a relatively simple synchronous serial protocol. Because it requires fewer pins, simple hardware implementation and strong scalability, it is widely used for communication between multiple integrated circuits (ICS) in the system.

directory

  • The physical layer
  • The protocol layer
    • Transfer process
    • Atomic operation

Following the routine of learning communication protocol, the physical layer and protocol layer of I2C are discussed respectively.

The physical layer

In the picture above, we can see:

  • It has only one data line
  • The bus is connected to multiple slave machines (or even multiple hosts)

Then, based on the simple communication knowledge and experience, we can draw the following preliminary conclusions:

  • If the master and slave can interact, it must be a half-duplex protocol

  • A data line is connected to multiple devices, which may cause data conflict when multiple devices access the bus

  • Each device must have a separate address

With this initial understanding of protocol details, we can quickly accept and remember the physical layer characteristics of I2C.

Physical layer characteristics

  1. It is a bus that supports devices. Can connect multiple I2C communication equipment, support multiple communication host, slave machine.
  2. Each device connected to the bus has a separate address.
  3. The bus is connected to the power supply through a pull-up resistor. When the I2C device is idle, it outputs high resistance state, and when all devices are idle and output high resistance state, the pull-up resistor pulls the bus to high level
  4. When multiple hosts use the bus at the same time, arbitration is used to determine which device occupies the bus to prevent data conflict.
  5. There are three transmission modes: standard mode: 100kbit/s, fast mode: 400kbit/s, and high speed mode: 3.4Mbit/s.
  6. The number of ics connected to the same bus is limited by the bus’s maximum capacitance of 400pF.

The protocol layer

The protocol layer defines:

  • Start and stop signals
  • Data validity
  • The response
  • The arbitration
  • Clock synchronization and broadcast address

In plain English, it defines the meaning of string 01 during transmission.

Transfer process

I call the basic, basic operations such as start and stop signals and response signals atomic operations.

Before discussing exactly how atomic operations are implemented, let’s take a look at the I2C transport process as a whole.

Generally speaking, I2C transmission process has such three cases: write, read, read and write mixed

Writing process

According to the figure above, the whole writing process consists of the following parts:

  • Send initial signal
  • From the machine address
  • Transport mode – Write mode
  • Acknowledge signal (indicating that a signal stanby has been received from the machine)
  • The host sends N bytes of data
  • Reply or non-reply signal
  • If no answer or the host does not want to receive, the host sends a stop signal

This is a very rigorous process. Every time you send a specific message, you need to wait for the reply of the other party. Only after you confirm that the receiver has received the message, you will continue to send data. The reliability of data transmission is guaranteed to the greatest extent.

It is worth noting that the slave address protocol provides for 7-bit or 10-bit options, but most of the time 7-bit addresses are used.

Read process

The whole reading process consists of the following parts:

  • Send initial signal
  • From the machine address
  • Transport mode – Read mode
  • Acknowledge signal (indicating that a signal stanby has been received from the machine)
  • Host sends N bytes of data (8 bits at a time)
  • Reply or non-reply signal
  • If no, the host sends a stop signal

Mixed read/write mode

The mixed-read/write process is a bit more complicated than the single-read/write mode.

It has two operations at a time:

  • The first time the target slave is told the address to read and write
  • The second actual operation is performed on the target read/write address

The specific process has the following parts:

  • Start signal
  • From the machine address
  • Transport mode – Read mode
  • Acknowledge signal (indicating that a signal stanby has been received from the machine)
  • The host sends the destination address to be read
  • Response signal
  • Secondary initiation signal
  • Select the same slave
  • Modify the output mode – write mode
  • Response signal
  • Send or read N bytes of data
  • Response signal
  • Termination of the signal

According to my preliminary study and analysis, there are three modes, which should correspond to three different needs:

  • Only output should be something like a monitor
  • All you need to read is the sensor data
  • Such as read/write mixing, first locate the exact location, then read/write data, should be only memory

Atomic operation

The above transmission process is relatively macro. Let’s take a look at how I2C implements these signals.

The following implementation is protocol specific design, is artificial positioning, although there is a certain internal design logic in it, but only need to remember the definition.

Start and stop signals

When the following conditions are met at the same time, the starting signal is:

  • The SCL is high level
  • SDA changes from high level to low level, note that it is when the level is changed!!

When the following conditions are met at the same time, the termination signal is:

  • The SCL is high level
  • SDA changes from low to high

Data representation

Also called data validity, it specifically defines the level representation of 01 data.

Expression of 1:

  • The SCL is high level
  • And SDA is high level

Representation of 0:

  • The SCL is high level
  • And SDA is low level

When SCL is low, SDA has no meaning. At this time, 01 represents the time to switch.

According to the above definition, I2C can transmit only one bit of data in a clock cycle.

Summary of the above points are: SCL is a high voltage level, the data is valid.

Address and data direction

The protocol defines the address as 7-bit or 10-bit, which is optional. Generally, 7-bit is selected.

The reason is simple: a single byte is 8 bits. Address bit 7 + direction bit is exactly one byte.

Therefore, there are also two kinds of address names that need to be paid attention to:

  • The highest 7 bits of data – the slave address
  • The entire 8-bit data — write address/read address

The response

Each time a byte is received, the receiver sends an ACK or NACK signal to the sender.

The protocol specifies that this signal is generated in the ninth clock cycle after the transmission of one byte of data.

At this time, if SDA is low level, it represents the answer signal, otherwise, it is the non-answer signal.

summary

With the above understanding of I2C protocols. It will be found that the XXX communication protocol, namely, the control level changes on the bus in accordance with the protocol standard. As long as the characteristic level specified by the protocol can be realized, the protocol can be implemented. So both software and hardware can realize this protocol communication. The difference is that software implementations consume CPU resources, while hardware communication reduces the CPU burden.