Computer Basic knowledge building trilogy:

  • Part I: Foundation series – Cheat sheet version of basic computer knowledge
    • Including history, CPU, bus, memory, instruction system, controller, arithmetic, bit operation, etc
  • The second part: Base series – operating system basic knowledge cheat sheet edition
    • Including process and thread synchronization management, job management, storage management, virtual memory, Linux, file management and so on
  • The third part: Foundation series – computer network basic knowledge cheat sheet edition
    • It includes OSI seven layer model, IP protocol, TCP\IP protocol, Http protocol, DNS protocol, etc

directory

  • Article 1. The background
    • 1.1 Computer History
    • 1.2 CPU History
    • 1.3 32-bit VS 64-bit
    • 1.4 Classification of computers
    • 1.5 Computer system and structure
    • 1.6 Program translation and interpretation
    • 1.7 Computer layers
    • 1.8 The unit of account of a computer
    • 1.9 The character and code set of a computer
  • (2) of article
    • 2.1 Computer bus
    • 2.2 Input and output devices of computers
    • 2.3 Computer Memory
    • 2.4 Main memory and auxiliary memory
    • 2.5 Cache
    • 2.6 Computer instruction system
    • 2.7 Computer controller
    • 2.8 Arithmetic unit of computer
    • 2.9 Execution process of computer instructions
  • Article 3. Calculation
    • 3.1 Basis of base operation
    • 3.2 Source code & inverse code & complement
    • 3.3 Fixed-point and floating point numbers
    • 3.4 Fixed-point number addition and subtraction operation
    • 3.5 Floating point addition and subtraction operations
    • 3.6 Multiplication and division of floating point numbers
  • 4. About me
  • Reference 5.

Article 1. The background

1.1 Computer History

  • Electronic Tube Computer (1946-1957)
    • ENIAC
  • Transistorized Computer (1957-1964)
    • Bell LABS and MIT Lincoln LABS ‘TX-0 and PDP-1 are equipped with 4K memory and display
  • Integrated Circuit Computer (1964-1980)
    • Texas instruments engineers invented the integrated circuit (IC), IBM(7094,1401), and System/360 operating systems
  • Vlsi Computer (1980-present)
    • Steve Jobs Apple and Apple II
  • Computers of the future
    • Biological computer
    • Quantum computer

1.2 CPU History

  • Moore’s law
    • Definition: At constant price, the number of transistors that can be accommodated in an integrated circuit doubles roughly every 18 to 24 months, and so does its performance.
    • This law revealed the speed of information technology development, but today, Moore’s Law has failed. Because as chips get smaller, pushing the limits of size and heat dissipation, they can’t fit any more electronics into them.
    • So computing power began to evolve in a different way, that is multi-core, for example, a common NVIDA video card has hundreds of cores, so that a large number of concurrent calculations can be done; In addition, there may be thousands of cores in a distributed big data cluster.
  • History of single-core CPU
    • (1971 ~ 1973) 500KHz frequency microcomputer (word length 8 bits)
    • (1978 ~ 1985) 500MHz frequency microcomputer (word length 16 bits)
    • (1985 ~ 2000) microcomputers with frequencies higher than 1GHz (32-bit word length)
    • (1973-1978) Microcomputers with frequencies higher than 1MHz (word length 8 bits)
    • (2000 ~ present) microcomputers higher than 2GHz frequency (64-bit word length)
  • History of multi-core CPU
    • (2005) Intel Pentium series dual core CPU, AMD Velon series
    • (2006) Intel Core quad-core CPU
    • Intel Core series 16-core CPU
    • Intel Xeon series 56 core CPU
  • How is CPU digital power generated
    • Time is the most important input: crystal vibrations
    • Electricity is fed to a chip in which an electronic component called a crystal (a quartz crystal) vibrates when it is energized
    • The oscillation produces a steady frequency pulse, usually a high frequency pulse, up to a million times per second
    • This signal is then emitted through the resonance effect, forming a square wave
    • Then adjust the frequency of this pulse through electronic components, the pulse signal is converted to the required frequency, which forms the clock signal to drive the chip
    • Finally, the clock signal drives the chip, like the pulse of the human body. With each pulse, the chip state changes, and the instructions in the memory are executed line by line

1.3 32-bit VS 64-bit

  • 32-bit indicates the operating system, software, CPU, etc
  • 32-bit capacity: 2^32 = 4 x 2^30 = 4𝐺𝐡
  • 64 capacity: 2 ^ 2 ^ 64 = 34 30 = 2 x 2 ^ ^ 34 𝐺 𝐡 = 24 t ^ 2 𝐡 14 eb = = 2 ^ 2 ^ 4 eb
  • If it’s a CPU, there are 32-bit cpus and there are 64-bit cpus
    • If the CPU can compute four bytes at a time, we call it a 32-bit CPU
    • If the CPU can compute eight bytes at a time, we call it a 64-bit CPU
    • The 32 and 64 here are called the bit widths of the CPU
    • 64-bit cpus can perform larger numerical operations, which is not obvious in general applications, but is significant for numerically intensive applications.
    • 64-bit cpus can address more memory space
  • If 32-bit / 64-bit is the program, then the instruction is 64-bit or 32-bit.
    • 32-bit instructions execute on 64-bit machines with little difficulty and are compatible.
    • If it is a 64-bit instruction, it is difficult to execute it on a 32-bit machine, because the 32-bit registers do not hold the parameters of the instruction.
  • If 32-bit / 64-bit is the operating system
    • An operating system is also a program. If it is a 64-bit operating system, the instructions of the programs in the operating system are all 64-bit instructions and therefore cannot be installed on a 32-bit machine.

1.4 Classification of computers

  • Supercomputer
    • Most powerful
    • Computing speed is measured in TFlop/s (1TFlop/s= one teraflop per second)
    • Intel(R) Core(TM) i7-6700K CPU @ 4.00ghz: 44.87 GFlop/s (0.04487TFlop/s)
    • World ranking: Summit IBM (USA) > Sunway Taihu Light (China) > Sierra IBM (USA)
    • China ranking: Sunway Taihulight > Tianhe-2 > Tianhe-1
  • Mainframe (also called mainframe, mainframe, mainframe, etc.)
    • IBM Z9
    • Mainframes are expensive
    • Go to “IOE” action (I(IBM) O(Oracle) E(EMC)) — Ali Cloud
  • Minicomputer (server)
    • Ordinary servers have replaced traditional mainframes as the backbone of large-scale enterprise computing
  • The workstation
    • A high-end general-purpose microcomputer that offers more power than a personal computer
    • Similar to a regular desktop computer, larger but more powerful
  • microcomputer
    • Small as a sparrow is, it has all the organs
    • In essence, personal computers are no different from the previous categories

1.5 Computer system and structure

  • Alan Turing

    • British (1912-1954) mathematician turned logician net Micken, analyst and theoretical biologist, known as the father of computer science and artificial intelligence.
    • Turing machine
    • The Turing test
    • Turing complete
    • decidability

  • Turing machine

    • The Turing machine had an infinite strip of paper, with cells next to each other on which characters could be written. You could think of the tape as memory, and these characters could be thought of as data or programs in memory.

    • A Turing machine has a read-write head, which can read and overwrite characters on any grid.

    • Inside the boxes on the reading and writing heads were sophisticated parts, including the Turing machine’s memory, control unit and arithmetic unit.

    • Alan had proved mathematically that a problem was computable if it could be broken down into the executable steps of a Turing machine.

    • Turing machine, on the other hand, defines the composition of a computer and how it works, but does not give a concrete implementation.

  • Von Neumann system

    • A computer design concept that stores program instructions and data together. Modern computers are von Neumann machines

    • Ability to remember programs, data, intermediate results, and final results for a long time

    • Able to send required programs and data to the computer

    • Capable of arithmetic, logical operation and data transmission

    • Ability to output processing results to users as required

    • Von Neumann bottleneck: A problem between CPU and memory rates that cannot be reconciled causes the CPU to often idle waiting for data transfer

  • The von Neumann unit is constructed

    • Input devices
      • Mouse, keyboard
    • Output devices
      • display
    • memory
      • CPU, memory, and hard disk
    • The controller
      • CPU
    • Arithmetic unit
      • CPU

1.6 Program translation and interpretation

  • Human language and computer language need to be transformed between languages

  • Translation program

    • L1 is a high-level language for describing program logic

    • L0 is the low-level language that the computer actually executes

    • Compiler: The compiler corresponding to the high-level language

    • Program translation is a compiler that translates L1 into L0

    • The translation process generates a new L0 program

    • Related languages executed by the compiler

      • C/C++
      • Object-C
      • Go

  • Application to explain

    • L1 is a high-level language for describing program logic

    • L0 is the low-level language that the computer actually executes

    • Interpreter: a program implemented using the L0 language

    • The process of program interpretation is that the interpreter interprets L1 to L0

    • The interpretation process does not generate new L0 programs

    • Related to the language

      • Python
      • Php
      • Javascript

  • Hybrid language

    • Java (Java programs translated into bytecode, bytecode interpreted into machine code)
    • C#

1.7 Computer layers

  • Hardware logic layer
    • Door, trigger and other logic circuit composition
    • It belongs to the field of electronic engineering
  • Microprogram machine layer
    • Programming languages are microinstruction sets
    • The microprogram composed of microinstructions is executed directly by hardware
    • Typically, the hardware vendor company handles this layer
  • Traditional machine layer
    • Programming languages are CPU instruction sets (machine instructions)
    • A machine instruction corresponds to a microprogram, and a microprogram corresponds to a set of microinstructions
    • Programming languages and hardware are directly related
    • Different architectures use different CPU instruction sets (Intel, AMD, x86/X86_64)
  • Operating system layer
    • Provides a simple operation interface
    • The command system is connected down to manage hardware resources
    • The operating system layer is the adaptation layer between software and hardware
  • Assembly language layer
    • The programming language is assembly language (PUSH DS/PUSH DS)
    • Assembly language can be translated into directly executable machine language
    • The program that completes the translation process is the assembler
  • High-level language layer
    • There are hundreds of categories of high-level languages
    • Common high-level languages include Python, Java, C/C++, Golang, etc
  • The application layer
    • Meet a computer designed specifically for a particular purpose
    • The WPS, IDE

1.8 The unit of account of a computer

  • Capacity of the unit

    • At the physical level, high and low levels record information

    • In theory, there are only two states known as 0/1. 0/1 is called a bit.

    • 0/1 represents too little and requires a larger capacity representation

    • Larger units of capacity: byte, kilobyte, Megabyte, gigabyte, terabyte, petabyte, exabyte

    • Why buy mobile hard disk 500G online, after formatting only 465G?

      • Hard disk, general use 10 carry flag capacity πŸ“ 𝟎 𝟎 βˆ— 𝟏 𝟎 𝟎 𝟎 ^ 3 / 𝟏 𝟎 𝟐 πŸ’ ^ 3 is approximately equal to πŸ’ πŸ” πŸ“
      • Vendors adopt decimal system for better communication
Capacity of the unit bit Byte KB MB GB TB PB EB
The name bits byte Kilobyte Megabyte = Megabyte Gigabytes = gigabytes Terabyte = terabyte Petabyte = petabyte ExaByte =2^60 bytes
conversion – 8bits 1024B 1024K 1024M 1024G 1024T 1024P
Common equipment gate register The cache Memory/Hard Disk The hard disk Cloud drive The data warehouse
  • Speed of the unit
    • Network speed
      • 100 m bandwidth = 100 m/s
      • Why is the test peak speed of 100M/s fiber only 12M/s?
        • Common network unit: (Mbps)
        • BPS (bits per second): indicates the number of bits transmitted per second
        • 100M/s = 100Mbps = 100Mbit/s
        • 100 mbit/s = (100/8) MB/s = 12.5 MB/s
    • Computing speed
      • The CPU speed is generally reflected in the CLOCK frequency of the CPU
      • The clock frequency of the CPU is usually measured in Hertz.
      • Current mainstream CPU clock frequency is above 2GHz
      • Hz is a fraction of a second, not just a unit that describes computing
      • Hz is a measure of the number of cycles per second
      • 2 GHZ = 2*1000^3Hz = 2 billion times per second

1.9 The character and code set of a computer

  • The ASCII code of early Britain and America

    • American Standard Code for Information Interchange

    • ASCII code can be fully represented using seven bits

    • Contains 95 printable characters and 33 non-printable characters (including control characters)

    • A lot of applications or countries don’t represent symbols

    • Cannot represent mathematical symbol: “Γ· β‰  β‰₯ β‰ˆ Ο€”

    • πŸ‘πŸ‘ + πŸ—πŸ“ = πŸπŸπŸ– = 𝟐^7

  • Externed ASCII

    • The ASCII code is expanded for the first time. 7bits => 8bits

    • Common mathematical operators

    • European character with tone symbol

    • Other common characters, table characters, etc

  • internationalization

    • Linguistic diversity in Countries of Europe, Central Asia, East Asia and Latin America
    • The language system is not the same, does not combine with limited characters language
    • Chinese, Korean and Japanese languages are the most complex
    • Chinese code set
      • GB2312
        • “Chinese Coded Character Set for Information Interchange — Basic Set”
        • A total of 7445 characters are included
        • Including 6,763 Chinese characters and 682 other symbols
        • Incompatible with international standards
      • GBK
        • Downward compatible with GB2312, upward supporting international ISO standards
        • Code Extension Specification for Chinese Characters
        • It contains 21003 Chinese characters, supporting all Chinese, Japanese and Korean characters
        • The international computer does not install GBK code will display garbled code
        • The Windows system in China uses GBK code by default
    • Unicode
      • Unicode: Unicode, universal, single, compatible with the global character set
      • Unicode defines the universal set of symbols, and UTF-* implements the encoding
      • Utf-8 encodes Unicode in bytes

(2) of article

2.1 Computer bus

  • Overview of the Bus

    • USB = Universal Serial Bus

      • Provides interfaces for external connection
      • Different devices can be connected through USB interface
      • The standard of connection promotes the unification of peripheral interfaces

    • Bus classification

      • On chip bus
        • The bus inside the chip
        • Register to register
        • Between register and controller and arithmetic unit
      • The system bus
        • Information transmission lines between cpus, main memory, I/O devices, and components
        • The data bus
          • Two-way transmission of data information of each component
          • Generally the same as the CPU bits (32-bit, 64-bit)
          • The bit of the data bus (bus width) is an important parameter of the data bus. The 64-bit bus can transmit 8 bytes of data at a time
        • The address bus
          • Specifies the memory address of the source or destination data
          • Address bus bit =n, address range: 0 to 𝟐^n
          • The bits of the address bus are related to the storage unit
        • Control bus
          • A control bus is a transmission line used to send out various control signals
          • Control signals are sent from one component to another via the control bus
          • The control bus can monitor the state (ready/not ready) between different components

  • Bus mediation

    • In order to solve the conflict of bus use rights
    • Bus mediation method
      • Chain query – series
        • All devices can apply to the arbiter for the right to use, and the arbiter allocates the right to use one by one in a chain order, whose turn it is
        • Advantages: low circuit complexity, simple arbitration mode
        • Cons: Low priority devices have difficulty getting access to the bus
        • Cons: Low priority devices have difficulty getting access to the bus
      • Timer timing query – parallel
        • The quorum controller numbers equipment and uses a counter to accumulate counts
        • After receiving the quorum signal, send the count value to all equipment simultaneously
        • If the number is consistent with the device number, the bus will be used
      • Standalone request-loop
        • Each device has a bus-independent connection mediator
        • The device can separately send and receive requests to the mediator
        • When more than one request signal is received at the same time, the arbitrator has the right to allocate the right of use according to priority
        • Benefits: Fast response time, priority order can change dynamically
        • Benefits: Fast response time, priority order can change dynamically

2.2 Input and output devices of computers

  • Common input/output devices

    • Input devices

      • Character input device
        • Keyboard:
          • Membrane keyboard
          • Mechanical keyboard (divided into black axis, red axis, green axis and tea axis according to paragraph sense, sound, pressure and key path)
          • Capacitive keyboard
      • Image input equipment
        • The mouse
        • Digital board: commonly used for graphic design, input board and stylus
        • Scanner: converts graphic information into digital signals

    • Output devices

      • display
        • The CRT display
        • Liquid crystal display
      • The printer
      • The projector

  • General design of input and output interfaces

    • General design considerations: reading data, sending data to the device, is the device occupied? Is the device started? Is the device connected?
    • cable
      • It is a transmission line for data exchange between the I/O device and the host
      • Unidirectional transmission data line
      • Two-way transmission data line
    • The status line
      • I/O Device status Signal cable reporting to the host
      • Check whether the device is properly connected and ready
      • Check whether the device is occupied
    • The command line
      • Signal cable through which the CPU sends commands to the device
      • Send read/write signal
      • Send start stop signal
    • Equipment selection line
      • The host selects a signal cable for the I/O device
      • Select the device connected to the bus

  • Communication between CPU and I/O device

    • The CPU speed is inconsistent with that of the I/O device

    • Program interrupt

      • Sends an interrupt signal to the CPU when the peripheral IO device is ready

      • The CPU has dedicated circuits that respond to interrupt signals

      • Meaning of interruption

        • Provides an asynchronous way for low-speed devices to notify the CPU
        • The CPU can run at high speed and respond to slower devices
        • Improving productivity (problems with polling)
        • Fault recovery (exception handling, emergency, etc.)
        • Simplified programming model (try/cache, timer, etc.)

    • For example, the process of printing data through a computer

      • Interrupt corresponding process

      • Interrupt request type

        • Hardware sent to the motherboard (printer, keyboard, mouse, etc.)
        • Hardware interrupt: CPU exception (divided by 0), clock signal, etc
        • Software interrupts: emitted (exceptions, switching to kernel state, etc.)

      • Interrupt direction meter

        • Areas (usually in memory) that store the correspondence between interrupt types and interrupt responders. Each row is called an interrupt vector.

          Interrupt type ISR address describe
          00 0x0000 Divide by zero
          01 0x0004 Single step
          09 0x0024 The keyboard
          18 0x0048 The printer
          100 0x0190 The custom

      • Interrupt the QA

        • Interrupt response path (ISR) on 32-bit machine is only 4 bytes, how to implement complex program?
        • The keystroke program interrupts the response path to the operating system and then to the application, but how do you know which keys are being pressed?
        • After the interrupt response, how to return to the state before the interrupt execution?
        • Now that it’s wrong? Why not go straight to the error handling location?

    • DMA (Direct memory Access)

      • DMA directly connects main memory to IO devices

      • DMA directly connects main memory to IO devices

      • There is no need to interrupt the CPU when the main memory exchanges information with the I/O device

      • Can improve CPU efficiency

      • There are DMA devices in both the hard disk and the external video card

2.3 Computer Memory

  • Classification of memory

    • Classified by storage media
      • Semiconductor memory: memory bar, U disk, solid state disk
      • Magnetic storage: magnetic tape, disk
    • Classified by access mode
      • RAM: Random reads are position-independent
      • Serial storage: To find sequentially in relation to location
      • Read-only memory (ROM) : read only without writing

  • Memory index

    • Read/write speed: 7200 RPM
    • Storage capacity: 2 TB
    • Price: Capacity + Price => Bit price: price per bit

  • hierarchy

    • Cache: fast speed, high bit size
    • Main memory: moderate speed, moderate bit space
    • Auxiliary storage: slow speed, low bit grid
    • Cache-main memory hierarchy
      • Principle: Locality principle
      • Implementation: Add a fast (small capacity) Cache between the CPU and main memory
      • Objective: To solve the problem of insufficient main memory speed
    • Main-secondary storage level
      • Principle: Locality principle
      • Implementation: add auxiliary memory (disk, SD card, U disk, etc.)
      • Objective: To solve the problem of insufficient main storage capacity
    • Locality principle

      • The principle of locality states that when a CPU accesses memory, both instructions and data, the accessed memory units tend to be clustered in a small contiguity area.

2.4 Main memory and auxiliary memory

  • Computer power failure, memory data loss

  • When the computer is powered off, disk data will not be lost

  • Main memory

    • RAM (Random Access Memory)
    • RAM stores data through capacitors and must be refreshed at regular intervals
    • If power fails, all data will be lost after a period of time
    • How do memory and CPU interact

    • 32-bit system: 2^32 = 4 x 2^30 = 4𝐺𝐡
    • 64 – bit systems: 2 ^ 2 ^ 64 = 34 30 = 2 x 2 ^ ^ 34 𝐺 𝐡 = 24 t ^ 2 𝐡 14 eb = = 2 ^ 2 ^ 4 eb
    • 32-bit systems support a maximum memory addressing range of 4GB, with one memory address for each byte. Memory addresses are numbered from 0. For example, the first address is 0, the second address is 1, and then they are incremented. The last address is the number of bytes in memory minus 1.
    • The working principle of
      • Word: refers to the combination of binary code stored in a storage unit
      • Block: A group of words stored in contiguous storage units and considered as a unit
      • Suppose a word has 32 bits, a word block has B words, and main memory has M words
        • BΓ—M = total number of words in main memory; B x M x 32 = Total capacity of main storage (bits)
      • The address of a word consists of two parts. The first M bit specifies the address of the word block, and the last B bit specifies the address of the word in the word block
        • 2^π‘š = 𝑀, the addressing range indicated by the first m potential energy is 0–2^π‘š
        • 2^𝒃 = 𝐡, the addressable range is 0–2^b

  • Secondary storage: disks

    • The surface is magnetized material with hard magnetic properties

    • Move the head radial motion to read track information

    • Track, sector, head position, head direction

    • Seek scheduling algorithm

      • First come, first served algorithm
        • Track read and write requirements for sequential access to processes
      • Minimum seek time is preferred
        • Is related to the current position of the magnetic head
        • Priority is given to the track nearest the head
      • Scanning algorithm (elevator algorithm)
        • You only move in one direction at a time
        • Get to the end of the service in one direction and move in the other direction
      • Cyclic scanning algorithm
        • You only move in one direction at a time
        • One way to the end and then start from the beginning and move in the same direction

2.5 Cache

  • To solve the speed mismatch between CPU and main memory

  • The relationship between cache and main memory

    • The logical structure of the storage is similar
    • The cache capacity is small
    • Caching is faster

  • Working principle in main memory cache hierarchy

    • The data the CPU needs is in the cache: fetch directly
    • The data needed by the CPU is not in the cache: it needs to be retrieved from main memory
      • A well-performing cache replacement strategy is required
    • Hit ratio: The hit ratio of cache access data
      • Hit ratio is an important performance metric to measure cache
      • Theoretically, the CPU can cache data every time, the hit ratio is 1
      • Number of accesses to main storage: Nπ‘š; number of accesses to Cache: N𝑐
      • Hit ratio β„Ž =𝑁𝑐/(𝑁𝑐+π‘π‘š)
    • Access efficiency: 𝑒
      • Main storage access time: π‘‘π‘š; cache access time: 𝑑𝑐
      • Average Cache- main storage system access time: π‘‘π‘Ž = β„ŽΓ—π‘‘π‘ + (1 βˆ’ β„Ž)Γ— β„Ž
      • 𝑒 = 𝑑 𝑐 / 𝑑 π‘Ž

  • Cache replacement policy

    • Random algorithm
    • First in first out (FIFO) algorithm
      • Think of the cache as a first-in, first-out queue
      • The first block to enter the queue is replaced first
    • Least Frequent use of algorithms (LFU)
      • Preference is given to the least frequently used blocks
      • Extra space is required to record the frequency of word block usage
    • Least Recently Used Algorithm (LRU)

      • Blocks that have not been used in a period of time are preferentially eliminated

      • If the block in use is in the cache, move it to the head of the table, ensuring that the list head node is the most recently used

      • There are many ways to do this, usually using bidirectional linked lists

2.6 Computer instruction system

  • Computer instruction

    • The computer directs the computer by instruction.
    • The CPU, driven by a clock, continuously reads instructions pointed to by the PC pointer, and increments the PC pointer to read instructions from memory and execute them. (Over and over again)
    • Different CPU architectures use different instructions. The most widely used RISC(Reduced Instruction Set Computer)

  • The form of machine instructions

    • Machine instruction mainly consists of two parts: operation code and address code
    • The opcode indicates what the instruction is to do
    • The number of bits of the opcode reflects the type of operation the machine operates on. If the opcode has 8 bits, there are 2^8 = 256 operations
    • The address code directly gives the operand or the address of the operand
    • It is divided into three address instruction, two address instruction and one address instruction and zero address instruction
      • Zero address instruction
        • There is no address code in machine instruction
        • Empty operation, stop operation, interrupt return operation, etc
      • One address instruction
        • (ADDR1)OPβ†’ (addr1) : self to their own operation
        • (ADDR1)OP(ACC) β†’ (ADDR1) : Auto-increment operation
      • Two address instruction
        • (ADDR1)OP(ADDR2) β†’ (adDR1) or (addr2) : Result placed in ADdr1 or ADdr2)
      • Three address instruction
        • One opcode and three address codes
        • (addr1)OP(addr2) β†’ (addr3) : result placed in addr3, e.g. : 1+2=3

  • Operation type

    • The data transfer
      • Transfer between registers, between registers and storage units, and between storage units
      • Data read and write, exchange address data, zero set first operation

  • The load/store directive is used to read/write from memory. There are usually multiple versions of the implementation, the mnemonics are: -load class: Iw,Ib, iH-store class: sw,sb,sh

    • Arithmetic logic
      • Addition, subtraction, multiplication and division between operands
        • Add, subtract, multiply, divide, etc. : addi, subi, divi, multi
      • The operation of and or not equal logical bits of operands
        • Bit operation instructions: and/or/ xOR

  • Shift operation

    • Data moved left (multiplied by 2), data moved right (divided by 2)
    • Performs the necessary operations on the data in the arithmetic logic unit
    • Control instruction
      • Wait instruction, stop instruction, empty operation instruction, interrupt instruction, etc

  • Addressing mode

    • Instruction addressing

      • Sequential addressing

      • Jumping addressing

        address instruction
        101 MOV R0,R1
        102 ADD R1,R2
        103 JMP 102

    • Data addressing

      • Addressing immediately
        • The instruction gets the operands directly
        • No need to access memory
        • Advantages: Fast speed
        • Disadvantages: Address code bits limit the operand representation range
      • Direct addressing
        • Directly gives the address of the operand in main memory
        • Finding operands is easy without computing data addresses
        • Advantages: Easy to find operands
        • Disadvantages: Address code bits limit the operand representation range
      • Indirect addressing

        • The instruction address code gives the address of the operand address

        • You need to access main memory one or more times to get the operands

        • Advantages: Large operand addressing range

        • Disadvantages: Slow speed

2.7 Computer controller

  • A controller coordinates and controls the operation of a computer
  • Program counter
    • The program counter is used to store the address of the next instruction
    • Loop to retrieve instructions from the program counter
    • When the instruction is taken out, it points to the next instruction
  • Sequence generator
    • Electrical engineering, used to send timing pulses
    • The CPU works rhythmically according to different timing pulses
  • Instruction decoder
    • Instruction decoder is one of the main parts of controller
    • Computer instructions consist of opcodes and address codes
    • Translate the operation corresponding to the opcode and control the transmission of address code corresponding data
  • Instruction register
    • The instruction register is also one of the main parts of the controller
    • Access computer instructions from main memory or cache
  • Main memory address register
    • Saves the address of the memory location that the current CPU is accessing
  • Main memory data register
    • Saves main memory data that the current CPU is about to read or write
  • Universal register
    • Used to temporarily store or transmit data or instructions
    • The intermediate results of ALU operation can be saved
    • Larger capacity than general special register

2.8 Arithmetic unit of computer

  • Arithmetic unit is used for data processing

  • Data buffer

    • It is divided into input buffer and output buffer
    • The input buffer temporarily stores data from peripherals
    • Output buffers temporarily store data sent to peripherals

  • ALU

    • ALU: Arithmetic logic unit, the main component of an arithmetic unit
    • Common bit operations (shift left and right, and/or not, etc.)
    • Arithmetic operations (addition, subtraction, multiplication, division, etc.)

  • Universal register

    • Used to temporarily store or transmit data or instructions
    • The intermediate results of ALU operation can be saved
    • Larger capacity than general special register

  • Status word register

    • Store operation state (condition code, carry, overflow, result plus or minus, etc.)
    • Store operation control information (debug trace marker bits, allow interrupt bits, etc.)

  • The bus

2.9 Execution process of computer instructions

  • Instruction execution process

    • Instruction fetch
      • Cache access instruction
      • Send to instruction register
    • Analysis of instruction
      • Instruction decoder decodes
      • Signal control
      • Program counter +1
    • An instruction to
      • Load data into registers
      • The ALU processes data
      • Recording operation state
      • Send the result of the operation

  • Pipeline design of CPU

    • Improve the overall CPU utilization
    • It’s like an assembly line in a factory
    • A factory assembly line allows multiple products to be processed at the same time
    • At the same time, different products are in different stages of processing
    • Serial execution of m commands: 𝑇1 = 3T x π‘š
    • Pipeline execution of m instructions: 𝑇2 = 𝑑 Γ— (π‘š + 2)
    • Pipelined execution efficiency: H = 𝑇 2 / 𝑇 1 = 𝑑 * (π‘š + 2) / 3 t * π‘š = 1/3 1/3 + m, m large is 3 times of serial execution efficiency
    instruction Time slice Time slice Time slice Time slice Time slice
    1 Instruction fetch Analysis of instruction An instruction to
    2 Instruction fetch Analysis of instruction An instruction to
    3 Instruction fetch Analysis of instruction An instruction to

Article 3. Calculation

3.1 Basis of base operation

  • What is base
    • Carry system is a counting system, also known as carry counting or bit-value counting
    • A finite number of symbols to represent an infinite number
    • The number of numeric symbols used is called the base or base of the carry system
    • Computers love binary, but binary expressions are too long
    • Using large base bits can solve this problem
    • Octal and hexadecimal meet the requirement of 2 to the n
    • binary
      • 1024=0b1000000000
    • octal
      • 1024=0o2000
    • Decimal: [0-9]
    • hexadecimal
      • MAC addresses [0-9] and A, B, C, D, E, and F
      • 1024=0x400
    • Two decimal
      • The Mayan numbers of the Mayan civilization
      • The Inuit number of Inuit
    • 6 decimal
      • Time, coordinate, Angle and other quantitative data
  • Base representation
    • Positive integer N, base r, number N
    • N=π‘‘π‘›βˆ’1 x rπ‘›βˆ’1 +π‘‘π‘›βˆ’2 x R π‘›βˆ’2 +… + port 1 x 𝑛 + port 0
    • N= 1024 = 1 x 10^3+ 0 x 10^3+ 2 x 10^1 + 4 x 10^0
    • 𝑁 = 10000000000 = 1 Γ— 2^10
  • Binary to decimal method
    • Expansion by weight
    • 𝑁 = 01100101 = 1 Γ— 2^6 + 1 Γ— 2^5 + 1 Γ—2^2 + 1 = 101
    • Weight expansion of decimals
    • 𝑁 = 1 x ^ 2 = 0.11001-1 + 1 x ^ 2 + 1-2 x ^ 2-5 = 25/32 = 0.78125
  • The method of converting from decimal to binary
    • (integer) repeated division
    • Divide by 2 again, get the quotient, take the remainder, the last remainder is the highest digit
    • (decimals) multiply repeatedly
    • Multiply by 2 again, get the product, take 1, the first remainder is the highest

3.2 Source code & inverse code & complement

  • Use 0 for a positive number, 1 for a negative number, the highest bit for a sign bit, and everything else is a number bit

  • + 237 = 011101101-237 = 111101101

  • Two bytes of 16 bits represent +237 [0] 0 0 0 0 0 0 0 1 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1 1 0 1

  • Source code representation

    • Use 0 for positive numbers and 1 for negative numbers
    • Specifies that the sign bit is the first digit of a number
    • The expression is simple and clear, and it is the easiest representation for human beings to understand
    • 0 can be expressed in two ways: 00 and 10
    • The source code is very complex to perform operations on, especially when the two operands have different symbols
      • Determine the absolute values of the two operands
      • Let’s take the number with the highest absolute value minus the number with the lowest absolute value
      • For the sign value, the value with the greatest absolute value prevails
    • I want to find a simpler way to calculate different sign operands
    • I want to find a way to use positive numbers instead of negative numbers
    • Eliminate subtraction by replacing subtraction with addition

  • Complement notation

    • The complement of an integer
      • If x∈[0, 2^𝑛) x =x, n is the number of digit bits
      • If x∈[βˆ’2^𝑛, 0) x =2^(𝑛+1) + π‘₯
        • For example: n=4, x=13, compute the binary source and complement of x
          • The original code: x = 0110 1
          • Complement: x = 0110 1
        • For example: n=4, x=-13, compute the binary source and complement of x
          • The original code: x = 1110 1
          • Complement: 2 ^ (𝑛 + 1) + π‘₯ = 2 ^ (4 + 1 () – 13 = 100000-1101 = 10011
    • The complement of decimals
      • If x∈[0, 1) x =x
      • If x∈[βˆ’1, 0) x =2+x
      • Rule: the reverse of decimal is equal to the original code in addition to the sign bit by bit, complement is equal to the reverse +1
    • In the process of calculating the complement, subtraction is used
    • We need to find ways to replace negative numbers with positive numbers

  • Inverse notation

    • The purpose of inverse code is to find the rules between the source code and the complement code and eliminate the subtraction in the conversion process
    • If x∈[0, 2^𝑛) x =x, n is the number of digit bits
    • If x∈[βˆ’2^𝑛, 0) x = (2^(𝑛+1)-1) + π‘₯
    • Rule: the inverse of a negative number is equal to the inverse of the original code except for the sign bit, and the complement of a negative number is equal to the inverse +1
      • -13, source code: 1,1101, inverse code: 1,0011, complement: 1,0010
      • -7, source code: 1,0111, inverse code: 1,1001, complement: 1,1000
      • -1, source code: 1 0001, inverse code: 1 1111, complement code: 1 1110
    • X =-13, compute the binary source and inverse of x

      • The original code: x = 1110 1

      • 𝑛 radix-minus-one complement: (2 + 1-1) + π‘₯ = (2 ^ 4 + 1-1) 13 = 011111-1101 = 1001-0

      • Radix-minus-one complement: x = 0 1001

3.3 Fixed-point and floating point numbers

  • Representation of fixed-point numbers

    • Numbers with a fixed decimal point are called fixed-point numbers
    • Pure decimal: sign or decimal point
    • 4. A sign or numeric point.
    • Other decimals need to be multiplied by a scaling factor to satisfy the fixed-point format. 10.01 needs to be moved two places left or two places right
    • The form of storage in a computer is shown in the table below. The decimal point is not shown
    The numerical The sign bit Numerical bit
    0.1011 0 1011
    0.1011 1 1011
    1011 0 1011
    – 1011. 1 1011

  • The representation of floating point numbers

    • For the most part, computers do not deal with pure decimals or whole numbers

    • The range of data is large and the number of fixed points is difficult to express

    • The representation of floating-point numbers

      • Analogical scientific notation: 123450000000 = 1.2345 Γ— 10^11, 1.2345: mantissa, 10: radix, 11: order code
      • 𝑁 = 𝑆 Γ— π‘Ÿ^𝑗, S: mantissa, r: radix, j: order code
      • Exponent sign bit | exponent values a | tail sign bit | tail number
      • The mantissa specifies pure decimals
      • 11.0101 = 0.110101 Γ— 2^10
      • 11.0101 = 0.0110101 Γ— 2^11
      • The form of storage in a computer is shown in the table below. The decimal point is not shown
      digital Step code symbol bit Step code numeric bit Mantissa sign bit Mantissa digit (8 digits)
      0.110101 x 2 ^ 10 0 10 0 1010100
      0.0110101 x 2 ^ 11 0 11 0 01101010

    • The range of representations of floating point numbers

      • Assume that the order code value is m bits and the mantissa value is N bits
      • The range of rank codes is as follows: [βˆ’(𝟐^π’Ž βˆ’ 𝟏), 𝟐^ port βˆ’ 𝟏]
      • Scope of mantissa said: [- (𝟏 – 𝟐 ^ – 𝒏), – (𝟐 ^ – 𝒏)] [𝟐 ^ – 𝒏, 𝟏 – 𝟐 – ^ 𝒏]
      • Single-precision floating point: 4-byte, 32-bit representation of float
      • Floating-point numbers: 8-byte, 64-bit representations of floating-point numbers (doubles)

    • Normalization of floating point numbers

      • The mantissa specifies pure decimals
      • The highest mantissa must be 1
      • For example, 11.0101 = 0.110101 x 2^10

  • Contrast between the two

    • When the fixed point number is the same as the floating-point number, the floating-point number represents a larger range
    • Floating-point numbers are more accurate when the mantissa is normalized (8 bits in the mantissa, more zeros in the front lose more precision)
    • Floating-point arithmetic is more complicated, since it consists of order codes and mantissa
    • Floating-point numbers are superior to fixed-point numbers in representation range, precision, overflow processing and programming
    • Floating-point numbers are inferior to fixed-point numbers in terms of operation rules, operation speed and hardware cost

3.4 Fixed-point number addition and subtraction operation

  • Integer addition: A + B + = 𝐴 + 𝐡 + (π‘šπ‘œπ‘‘2^(𝑛+1))

  • Decimal addition: A complement + B complement = 𝐴 + 𝐡 complement (π‘šπ‘œπ‘‘2)

  • The numeric bit is computed with the sign bit and the carry generated by the sign bit is discarded naturally

  • Integer subtraction: A complement βˆ’ B complement = 𝐴 + (βˆ’π΅) complement (π‘šπ‘œπ‘‘2^(𝑛+1))

  • Decimal subtraction: A complement βˆ’ B complement = 𝐴 + (βˆ’π΅) complement (π‘šπ‘œπ‘‘2)

  • -b complement is equal to B with the sign bit inverted, the last bit plus one, B complement = 1,0010101, (βˆ’B complement = 0,1101011

  • The inverse of a negative number is equal to the inverse of the original bit, and the complement is equal to the inverse +1

  • For example: A=-110010, B=001101, find A+B

    • A = 1,001110
    • B complement = B[original] = 0,001101
    • A complement + B complement = (A + B) complement =1,011011
    • (A + B) = βˆ’100101

  • For example, if A=11001000, B=-00110100, find a-b

    • A complement = A = 0,11001000
    • B = 0 1110110
    • (βˆ’B) θ‘₯ = 0,00110100
    • A complement βˆ’B complement = A + (βˆ’B) complement =0,11111100
    • A βˆ’ B = 111111100

  • Double sign bit judgment overflow

    • Double sign bit judgment method
      • The single sign bit indicates the double sign bit: 0=>00,1=>11
      • The carry generated by the double sign bit is discarded
      • A result with two different sign bits indicates an overflow

3.5 Floating point addition and subtraction operations

  • π‘₯ = 𝑆π‘₯ Γ— π‘Ÿ^𝑗π‘₯, 𝑆π‘₯ = 0.1101 Γ— 2^01

  • 𝑦 = 𝑆𝑦 Γ— π‘Ÿ^𝑗y, 𝑆𝑦 = (βˆ’0.1010) Γ— 2^11

  • The moral order

    • The purpose of doing this is to keep the order codes of two floating point numbers consistent so that the mantissa can be computed
    • Floating-point mantissa arithmetic is simple
    • The actual decimal place is related to the order code
    • Step code according to the small order to see the principle of large order
    digital Step code symbol bit Step code numeric bit Mantissa sign bit Mantissa digit (8 digits)
    0.1101 x 2 ^ 01 00 0001 00 1101
    (0.1010) – (2 ^ 11 00 0011 01 1010
    • Interiorly: Move x two to the right, π‘₯ = 0.001101 Γ— 2^11
    digital Step code symbol bit Step code numeric bit Mantissa sign bit Mantissa digit (8 digits)
    0.001101 x 2 ^ 11 00 0011 00 0011(01) Discard the last two digits
    (0.1010) – (2 ^ 11 00 0011 01 1010

  • Mantissa sum

    • Use the complement to perform the operation
    • Subtraction becomes addition: A -B = A + (-b)
    • π‘₯ = 00.0011, π‘₯ = 00.0011
    • 𝑦 = 11.1010, 𝑦 = 11.0110
    • S = (π‘₯ + 𝑦) = 11.1001
    digital Step code symbol bit Step code numeric bit Mantissa sign bit Mantissa digit (8 digits)
    11.1001 00 0011 11 1001

  • Mantissa normalization

    • β—† Complement normalization needs to judge two cases: S>0 and S<0
    • S[p] = 00.1 XXXXXX (𝑆 > 0)
    • S[p] = 11.0 XXXXXX (𝑆 < 0)
    • If it does not meet this format, it needs to move to the left and change the order code accordingly to meet normalization
    • S = (π‘₯ + 𝑦)[P] = 11.1001, which does not meet the convention format
    • S = (π‘₯ + 𝑦)[p] = 11. (1)0010
    digital Step code symbol bit Step code numeric bit Mantissa sign bit Mantissa digit (8 digits)
    11.0010 00 0010 11 0010
    • S = π‘₯ + 𝑦 + 11.0010, π‘₯ + 𝑦 = βˆ’0.1110
    • π‘₯ + 𝑦 = βˆ’0.1110 x 2^10
    • In general, it moves to the left, but in case of inconsistent sign bits, it needs to move to the right (overflow of fixed-point operation)
    • Moving to the right requires rounding

  • rounding

    • Round off (binary rounding)
    • The value of S complement is 11.01011011(1)+1=11.01011100
    • Right shift order code +1

  • Overflow judgment

    • Fixed-point operation double sign bit inconsistent overflow
    • Floating-point operation mantissa inconsistency does not count as overflow, because mantissa double can be measured right
    • Floating-point operation is mainly determined by the double sign bit of the order code
    • If the two sign bits of the order code are inconsistent after normalization, it is considered as overflow

3.6 Multiplication and division of floating point numbers

  • Multiplication: order code addition, mantissa product

  • π‘₯ Γ— 𝑦 = (𝑆π‘₯ Γ— 𝑆𝑦) Γ— 𝑦 ^(π‘₯+ 𝑦)

  • Division: order code subtraction, mantissa quotient

  • π‘₯/𝑦 = (𝑆π‘₯/𝑆𝑦) Γ— port ^(𝑦 βˆ’ port)

  • Exponent computation

  • Mantissa operation

  • Mantissa normalization

  • rounding

  • Overflow judgment

  • For example, π‘₯ = 0.11010011 Γ— 2^1101, 𝑦 = 0.11101110 Γ— 2^0001. Assume that the order code is 4 bits and the mantissa is 8 bits. Calculate x * y

    • π‘₯ Γ— 𝑦 = (𝑆π‘₯ Γ— 𝑆𝑦) Γ—^π‘Ÿ(𝑗π‘₯+𝑗y)
    • = (0.11010011 Γ— 0.11101110) Γ— π‘Ÿ^(1101+0001)
    • = 0.11000100(reserved eight bits) Γ— π‘Ÿ^1110

4. About me

A small code farmers focusing on basic knowledge, in line with the basic, system, practice, sharing of the learning concept, in self-improvement at the same time to share their own experience, continuous improvement, cycle after cycle.

Personal website basedev.cn

Github

BaseDev series only sort out the knowledge program so far, without deep understanding; He who wishes to know why must return to books and practice.

Reference 5.

  • Heavy learning operating system | retractor education

  • Network programming based | necessary for class