1. Definition of the base system The base system is composed of symbols and can be defined by itself. The carry point to the last digit. Binary: consists of two symbols, are respectively 0, 1, meet a octal binary: is composed of eight symbols, respectively is 0, 1, 2, 3, 4, 5, 6, 7, every eight into a decimal: consists of ten symbols, respectively is 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, ten into a hexadecimal: Composed of sixteen symbols, are 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F, every hexadecimal, of course, in addition to the conventional, there are three, four…. Base N, base symbols are not necessarily in the usual 123 order. The main function can be used for encryption. The result of the base operation is essentially obtained by looking up a table. Assembly mode 16-bit assembly: Real mode, 16-bit processor inside, can handle up to 16 bits of storage length. 32-bit assembler: Protected mode, 32-bit processor inside, can process up to 32 bits of storage length. 64-bit assembly: Protected mode, 64-bit processor inside, can handle stored length bits up to 64 bits.

Basic execution environment 32-bit: 8 32-bit universal register, flag register, instruction pointer register EIP 64-bit: 16 64-bit universal register, flag register RFLAGS, instruction pointer register RIP 2. Common register structures eAX: accumulator, operand and result data accumulator, return value operation results are generally stored here ebx: base address, DS segment data pointer, when memory addressing base address ecx: counter, string and loop operation counter edx: Esp: a pointer to a stack frame, usually pointing to the top of the stack. Esi: source pointer for string operations, SS data pointer EFLAGS Register: contains independent binary bits that are used to control or reflect the results of CPU operations. There are instructions that test and control these individual processor identity bits. The EFLAGS register status flags (0, 2, 4, 6, 7, and 11 bits) indicate the result of arithmetic instructions such as ADD, SUB, MUL, and DIV. These status flags do the following: CF(bit 0) [Carry flag] If the result of an arithmetic operation is carried or borrowed at the most significant bit, it is set to 1; otherwise, it is cleared. This flag indicates the overflow state of unsigned integer arithmetic, and is also used in multiple-precision arithmetic. PF(bit 2) [Parity Flag] : If the least significant byte of the result contains an even number of 1 bits, the position is 1. Otherwise, it is cleared. AF(bit 4) [Adjust Flag] : Set the flag to 1 if the arithmetic operation carries or borrows at the third bit of the result, otherwise zero is cleared. This flag is used in BCD(binary-code Decimal) arithmetic operations. ZF(bit 6) [Zero Flag] : If the result is 0, set it to 1; otherwise, clear it. SF(bit 7) [Sign flag] : This flag is set to the most significant bit of a signed integer. OF(bit 11) [Overflow Flag] : If the result OF an integer is a large positive number or a small negative number, and the destination operand cannot be matched, the position 1 will be reset otherwise. This flag indicates an overflow state for a signed integer operation. Of these status flags, only the CF flag can be modified directly by using STC, CLC and CMC instructions, or the specified bits can be copied to the CF flag by using bit instructions (BT, BTS, BTR and BTC). DF flag: This direction flag (at bit 10 of the EFLAGS register) controls the string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Set the DF flag to automatically decrement the string instruction (processing the string from high address to low address), and clear the flag to automatically decrement the string instruction. The STD and CLD directives are used to set and clear the DF flag, respectively. MMX Register: MMX technology improves the performance of Intel processors for advanced multimedia and communication applications. Eight 64-bit MMX registers support special instructions that become SIMDs. As the name implies, the MMX instruction performs direct parallel operations on data values in the MMX register. Although they appear to be separate registers. But the MMX register is actually an alias for the same register used in the floating point unit.

1. Create an empty project 2. Right-click create Custom and choose MASM rule. 3. Create a file with the. Asm suffix 4. Select project right – > Properties – > Linker – > System – > SUBSYSTEM > < CONSOLE (SUBSYSTEM)> 5. Right-click the project – > Properties – > Linker – > Advanced – > Entry point and fill in” Main “4. ADD(Addition) format: ADD OPRD1,OPRD2 function: The result OF the operation OF the Addition instruction will affect CF, SF, OF, PF, ZF and AF. OPRD1 and OPRD2 are not allowed to be memory with Carry Addition instruction at the same time. OPRD1 = OPRD1 + OPRD2 + CF 4.2 Subtraction Subtraction instruction SUB(SUBtract) The subtraction of two operands, namely, subtracting OPRD2 from OPRD1, results in OPRD1. The type and identifier of the instruction have the same effect as the ADD instruction. Note that the immediate number cannot be used for the destination operands, and the two memory operands cannot be directly subtracted. SuBtract with Forrow (SBB) Format: SBB OPRD1,OPRD2 Subtract the CF carry flag from the two operands, that is, from OPRD1 = oprd1-oprd2-cf. The result is placed in OPRD1 in the format of 4.3 MULtiply unsigned number instruction MUL(MULtiply) : MUL OPRD signed number instruction IMUL(Integer MULtiply) function: OPRD is a universal register or memory operand this instruction affects the CF and OF ## DIVision unsigned number DIVision instruction DIV(DIVision) format: DIV OPRD function: implement two unsigned binary number DIVision operation with signed number DIVision instruction IDIV(Integer DIVision) format: IDIV OPRD function: For example, there are two 8-bit registers for the 16bit dividend, AH: AL, the quotient is placed in AL, and the remainder is placed in AH. For example, there are 16 8-bit registers for the 32bit dividend, DX: EDX: EAX, RDX, RDX, RDX, RDX, RDX, RDX, RDX, RDX, RDX, RDX RDX 4.4 INCrement by 1 Instruction INC(INCrement by 1) 标 签 : OPRD + 1 DEC OPRD function: OPRD = OPRD-1 4.6 Loop command Loop control command loop format: loop label function: (CX)<– (CX)-1,(CX)<>0, then transfer to the label to execute the loop, until (CX)=0, continue to execute the command