Chip knowledge for Android developers

As an Android developer, it is inevitable to deal with the adaptation of ARM, ARMV7A, ARMV8A, x86 and other architectures. In addition, various industries have encountered the problem of “lack of core” this year, as well as the United States’ chip sanctions against Huawei. What technology is the sanction? This paper tries to clarify the following issues:

  1. What exactly is Android Dynamic Library adaptation adapting to?
  2. The relationship between CPU, architecture, instruction set and chip;
  3. What’s the A in ARMV7A?
  4. What is the core technology and threshold of chip?

CPU

Contact computer friends all know the meaning of CPU, is the central processing unit, is responsible for the main computing tasks of the computer components. We usually compare the CPU to the human brain. Those who know more will have heard that cpus are categorized into x86 and ARM, the former being used for PCS and the latter for devices such as phones and tablets.

So what do x86 and ARM mean here?

Instruction set

The CPU must comply with certain specifications when performing computing tasks. Programs must be translated into a language that the CPU can understand before being executed. This specification or language is ISA (Instruction Set Architecture). The process by which programs are translated into the underlying code that the CPU can recognize according to the specification of some instruction set is called compile. X86, ARM V8, and MIPS are all code names for instruction sets. The instruction set can be extended, such as x86-64 with 64-bit support for x86. A vendor’s development of cpus compatible with certain instruction sets requires authorization from the instruction set patent holder. A typical example is that Intel licenses AMD to develop cpus compatible with x86 instruction sets.

The most straightforward interpretation of the instruction set is that cpu-understood languages, for which human language is used to communicate, were bred in a certain environment. Different languages can “translate” each other, and certain groups of people can invent new languages. With so many languages in the world, why is English the main language used for international communication? Why is Chinese the most spoken language?

Similarly, there are only a few dominant instruction sets, not because of the complexity of creating them, but because of their fundamentals and ecology.

ARM, x86, MIPS, PowerPC, RISC-V and other mainstream instruction sets are introduced below.

ARM series

The ARM architecture, known as the Advanced RISC Machine (Acorn RISC Machine), is a 32-bit RISC processor architecture that is widely used in many embedded system designs. Due to the characteristics of energy saving, ARM processor is very suitable for the field of mobile communication, in line with its main design goal of low power consumption characteristics.

Today, the ARM family accounts for 75% of all 32-bit embedded processors, making it one of the most popular 32-bit architectures in the world. ARM processors can be found in a wide range of consumer electronics, from portable devices (PDAs, mobile phones, multimedia players, handheld video games, and computers) to computer peripherals (hard drives, desktop routers) and even in military installations such as missiles loaded with computers. There are also derivatives based on ARM designs, including Marvell’s XScale architecture and Texas Instruments’ OMAP series.

Advantages: Low price; Low energy consumption.

ARM licensing: ARM does not build or sell cpus with its own designs, but licenses processor architectures to interested manufacturers. ARM offers a variety of licensing terms, including items such as price and distribution. For licensees, ARM provides an integrated hardware narrative of the ARM kernel, complete with software development tools (compiler, Debugger, SDK), and sales rights for embedded ARM CPU silicon chips. Fabless licenserslooking to integrate ARM cores into their own chip designs are usually just looking to get a production-ready IP Core certification. For these customers, ARM releases a gate circuit diagram of the selected ARM core, along with abstract simulation models and test programs, to assist in design integration and validation. Customers with more requirements, including integrated component manufacturers (IDM) and wafer manufacturers, choose the composable RTL (register transfer hierarchy, such as Verilog) form to acquire the intellectual property (IP) of the processor. With integrable RTL, customers have the ability to optimize and enhance their architecture. This approach allows the designer to achieve additional design goals (high oscillation frequency, low energy consumption, instruction set extension, etc.) without being constrained by immobile circuit diagrams. Although ARM does not authorize the licensor to re-sell the ARM architecture itself, the licensor can sell artifacts (such as chip components, evaluation boards, complete systems, etc.) at will. Commercial fabs are a special case because they not only license the ability to sell finished silicon containing ARM cores, but they also typically retain the right to remake ARM cores for other customers.

Manufacturer: TI /Samsung /Freescale /Marvell /Nvidia

X86 family /Atom processors

Xx86 or 80×86 is a generic name for a microprocessor architecture first developed and manufactured by Intel.

The x86 architecture is the significantly variable Instruction length CISC (Complex Instruction Set Computer).

The Intel Atom (Silverthorne) is a family of ultra-low voltage processors from Intel. The processor is manufactured using a 45-nanometer process and integrates 47 million transistors. L2 cache is 512KB, supports SSE3 instruction set, and VT virtualization technology (some models).

Currently, there are six models in the Atom processor family, all of which belong to the Z500 family. They are Z500, Z510, Z520, Z530, Z540 and Z550. The lowest core frequency is 800MHz for Z500 and 400MHz for FSB. The fastest Z550 has a core frequency of 2.0GHz and FSB 533MHz. Starting with the Z520, all processors support hyperthreading, but with less than a 10% increase in power consumption. Dual-core version of the N series, still using 945GC chipset. The dual-kernel version will still support hyperthreading, so the system will display four logical processors. Instead of a native design, the two cores are simply packaged together.

MIPS series

MIPS is a popular RISC processor in the world. MIPS stands for “Microprocessor without interlocked Piped Stages.” MIPS is a software approach to avoiding data-related problems in pipelined systems. It was first developed in the early 1980s by a team of researchers led by Professor Hennessy at Stanford University. MIPS R series is based on this development of RISC industrial products microprocessor. These products are used by many computer companies to form a variety of workstations and computer systems.

MIPS Technology corporation is a famous chip design company in the United States, which uses RISC (Simplified Instruction System Computing Architecture) to design chips. Compared with The Complex Instruction System Computing Architecture (CISC) used by Intel, RISC has the advantages of simpler design, shorter design cycle, more advanced technology and faster development of the next generation of processors. MIPS is one of the earliest commercial RISC architecture chips to appear. The new architecture integrates all the original MIPS instruction sets and adds many more powerful features. MIPS designed the CPU itself and then licensed the design to customers, who were able to produce high-performance cpus.

PowerPC series

PowerPC is a compact Instruction set (RISC) architecture central processing unit (CPU), The basic design is derived from IBM PowerPC 601 microprocessor POWER (Performance Optimized With Enhanced RISC; “Enhanced RISC Performance optimization” (August 2007), IBM Connect Journal. In the 1990s, IBM, Apple, and Motorola successfully developed the PowerPC chip and built multiprocessor computers based on it. The PowerPC architecture is characterized by scalability, convenience and flexibility.

PowerPC processors have a wide range of implementations, ranging from high-end server cpus such as the Power4 to the embedded CPU market (PowerPC is used by the Nintendo Gamecube). PowerPC processors have very strong embedded performance because of their superior performance, low power consumption, and low heat dissipation. With the exception of integrated I/O like serial and Ethernet controllers, the embedded processor is very different from the “desktop” CPU.

RISC-V

Risc-v is an open source instruction set architecture (ISA) based on the reduced instruction set (RISC) principles. V stands for fifth generation RISC. In contrast to most instruction sets, the RISC-V instruction set can be used freely for any purpose, allowing anyone to design, manufacture, and sell RISC-V chips and software. Risc-v is considered the third largest CPU architecture after x86 and ARM.

Risc-v has three major advantages,

  1. Modularity: RISC-V organizes different parts together in a modular way that x86 and ARM architectures do not.

  2. Low number of instructions: RisC-V architecture has a very compact number of instructions thanks to its compact architecture and modular nature.

  3. Risc-v is fully open source, and has a full set of free open source compiler, development tools and software development environment, greatly reducing the threshold of instruction set modification.

Risc-v, as an emerging architecture, has an absolute advantage in the future IoT (Internet of Things) field with its streamlined size. The “fragmentation” of IoT requires that IoT chips be designed with high speed, low cost and customized energy. At the same time, the embedded market has a small number of diverse characteristics, and there are no real barriers in the segmented application scenarios, and the choice of architecture is varied. The above reasons make RISC-V an excellent breakthrough. Risc-v can be open source to reduce costs, but also allows users to modify freely, can be customized, RISC-V ecology and agile design homology.

At present, many chip enterprises at home and abroad have invested a lot of money in the research and development of RISC-V applications in the field of IoT. In 2015, the RISC-V Foundation was officially established, attracting the participation of companies including Nvidia, NXP, Samsung, And Microsemi. To date, the Foundation has attracted more than 327 members from 28 countries. At present, ali, amazon and other relevant chips have been developed, and even apple A4/A5, AMD velociron /Zen architecture father JimKeller also started risc-v.

architecture

We often talk about single-core, dual-core, quad-core, and main-frequency concepts.

The basic unit of CPU is the core. Multiple cores can perform multiple computing tasks simultaneously, provided that the tasks are not in sequence.

The way the core is implemented is called microarchitecture. The design of the microarchitecture influences the maximum frequency that the core can achieve, the amount of computation that the core can perform at a certain frequency, and the energy consumption level of the core at a certain technological level. In addition, different microarchitectures tend to execute different kinds of programs differently. For example, Intel’s P6 microarchitecture in the late 1990s excelled in floating-point programs, but was not as good as its lower-frequency counterpart in integer applications.

Common codenames like Haswell, Cortex-A15, and others are microarchitecture titles. Note that microarchitecture and instruction set are two different concepts: the instruction set is the language of choice for the CPU, while microarchitecture is the concrete implementation. At the heart of the i7-4770 is the Haswell microarchitecture, which is compatible with x86 instruction sets.

The two concepts are especially confusing for chips that are compatible with the ARM instruction set: ARM calls its instruction set the ARM instruction set, and it licenses specific microarchitectures such as the Cortex family. However, just because a CPU uses ARM’s instruction set does not mean it uses ARM’s microarchitecture. Intel, Qualcomm, Apple, Nvidia and others have all developed their own microarchitectures that are compatible with the ARM instruction set, while many other manufacturers use ARM microarchitectures to manufacture cpus. Generally, it is considered that only an enterprise with independent microarchitecture development capability is considered capable of CPU development, and it does not matter whether it uses its own instruction set. Microarchitecture research and development is also one of the most high-tech areas in the IT industry.

The following describes the ARM CPU architecture

The ARM architecture

CPU family

The ARM CPU family includes the cortex-a, Cortex-R, and Cortex-M series.

  • Cortex-a family: Primarily application-oriented processors. The Cortex-A family includes instruction set architecture for integer arithmetic and instruction set architecture for floating point arithmetic, and supports single-instruction multi-data stream high performance computing instructions. The Cortex-A family is the richest instruction set in the ARM family. The Cortex-A series is widely used in mobile development. Armv7-a is A 32-bit Cortex-A architecture, and armV8-A is an extension of ARMV7-A. Most mobile phones using ARM architecture use the 64-bit ArmV8-A architecture, such as Cortex-A57, Cortex-A53, and the newly released Cortex-A76 architecture. At the same time, ARM company is also continuously expanding the ARMV8-A instruction architecture, has issued ARMv8.1, ARMv8.2, ARMv8.4 and ARMv8.5. Cortex-a series is used in Android phone scenarios. The A of armV7A in Android development represents cortex-A series.
  • The Cortex-R family is the smallest processor in the ARM family. The Cortex-R family of processors is designed for real-time hardware platforms such as hard drives and controllers. The Cortex-R family of processors supports ARM, Thumb, and thumb-2 instruction sets.
  • The Cortex-M series is designed for ultra-low power consumption and minimal core area, so the current RTOS of the Cortex-M series only supports 32-bit Thumb instruction sets. The ARM Cortex-M family uses a thumb-2 instruction set, which reduces the amount of instruction code required to make more efficient use of caches. The thumb-2 instruction set is compatible with 16-bit Thumb instructions.
  • The SecurCore family of early processors is an architecture that provides security solutions. SecurCore architecture is a security solution. The early processor SecurCore is used in a few microcontrollers.
  • The early ARM chips had relatively simple version numbers and low architectural complexity.

ARM business model introduction

Once the microarchitecture, or core, is developed, the next step is to assemble it into a chip. In the past, chips only included CPU. Nowadays, a large number of chips integrate CPU, GPU, IO and other different functional components. At this time, such chips are not “CPU” in the traditional sense. The amount of technology required to assemble functional components into chips is lower than in microarchitecture development, so there are more companies in the industry that can do it. Different microarchitecture r&d enterprises use different business models. In the PC era, the major CPU developers developed their own microarchitectures for their own use. ARM’s microarchitecture is the licensing model. ARM develops its own microarchitectures and sells them on the shelves, and other manufacturers can assemble the cores into chips that can be used or sold. This model has been widely successful because it requires little technical capability from third parties and because ARM’s microarchitecture is superior in low-power areas.

If you find a chip that says it uses the Cortex family core, it’s definitely a product of this pattern. As mentioned earlier, vendors that simply buy microarchitectures from ARM to assemble chips cannot be called CPU developers, nor can these chips be called “CPUS developed by XX manufacturers.” Typical examples include Huawei’s Hesi 920 and Samsung’s Exynos 5430, which can only be described as “chips using ARM Cortex-A15 core”.

However, if a chip based on the ARM instruction set uses a manufacturer’s own microarchitecture, the situation is different. Qualcomm’s Snapdragon 800 and Apple’s A7 are examples — they use cpus developed by Qualcomm and Apple, respectively.

Let’s take a look at the cpus of some of the major phones.

Mainstream CPU vendors and application phones

In the mobile end, we focus on chips designed by Qualcomm, Apple, Mediatek, Huawei and Samsung, because the ARM chip architecture designed by them can cover mainstream models.

qualcomm

Qualcomm’s main Snapdragon series, currently 8XX series belongs to high-end Snapdragon series, while 6XX series is positioned at the middle end of the market. But there will be crossover in the high school market, not always. Snapdragon chips are carried by a large number of popular phones, including Vivo, OPPO, Xiaomi and others.

Qualcomm officially unveiled the Snapdragon 888 flagship platform processor at the snapdragon Tech Summit 2020, which will support the next generation of flagship smartphones

The Snapdragon 888 is based on Samsung’s 5nm process and is powered by a CPU of 1 x 2.84ghz (ARM’s latest Cortex X1 core)+3 x 2.4ghz (Cortex A78)+4 x 1.8ghz (Cortex A55). The GPU is Adreno 660, with X60 5G modem baseband, WiFi 6E and Bluetooth 5.2. Here is the snapdragon 888 architecture.

In the market, Mi 11 Pro, Meizu 18 Pro/ Meizu 18 use Snapdragon 888, while Meizu 17 Pro uses Snapdragon 865.

Mediatek (MTK)

China’s chip research and development companies, mainly low-end chips. Mediatek’s chip design business has deep layout in home entertainment, mobile phone and tablet, IoT, portable electronic products and other fields. We are familiar with SONY, TCL, Haier and other TVS all use Mediatek chips; At the same time, its chip solution is adopted by Amazon, Google, Ali and other domestic and foreign first-tier brands, which occupy the top three positions in the global sales of smart speaker business, with a market share of more than 70%. Tmall Genie also carries mediatek’s chip.

samsung

Chip is only one of its many businesses, and mobile phone is also one of its important businesses, from components such as chips, screens, storage, batteries, etc., to the whole mobile phone can be produced. Exynos8895 is a high-end chip released by Samsung. Its mid-range chips include Exynos7870 and so on. Samsung chips have a relatively small presence in China’s mobile Internet market. Most Samsung phones in the domestic market do not use Samsung chips, and Qualcomm, there must be some other considerations.

apple

The chips in Apple’s mobile phones are all based on ARM architecture, and Apple already has strong chip design capabilities. The CPU frequency of the Apple A series is not very high. Apple’s chips are produced and sold by itself, and the chip architecture is directly applied in its own iPhone, so it pays more attention to the improvement of performance, but considers less about the cost of the chip, and uses a large chip area to exchange for high performance and low power consumption, which is significantly different from most companies in the same industry. On apple’s A10 processor, pipelinetechnology uses six streams to process six streams simultaneously, while the A10 has a 2MB on-chip cache. As you can see from the A10, Apple’s chip architecture costs more than other companies, and the overall performance is very good. The performance advantage of Apple’s chips can also be seen in the Geekbench scores, with the A10 performing more than 75% better than the STANDARD ARM 73 architecture.

This year, Apple’s new M1Pro and M1 Max chips can have up to 200 GB of memory bandwidth per second and support 32 GB of memory. It is a five-nanometer process with 337 transistors and a 10-core central processing unit, which is about 70 percent faster than the previous chip.

Huawei haisi

In 1991, Huawei established its own ASIC Design Center, which is responsible for the design of application-Specific Integrated circuit (ASIC). At that time, Huawei, founded only four years ago, had only a few dozen employees and was very short of money. It was once on the verge of bankruptcy. The C&C08 digital program-controlled switch, which laid the foundation of the industry, was still three years later.

The establishment of the ASIC design center means that Huawei has started the long journey of IC design.

In 1993, ASIC Design Center successfully developed Huawei’s first digital ASIC.

Subsequently, in 1996, 2000, 2003, the successful research and development of 100,000 gate level, million gate level, ten million gate level ASIC. All in all, every step was steady and forceful.

By October 2004, Huawei’s strength was far from what it had been, with sales of 46.2 billion yuan and tens of thousands of employees. With a certain confidence, Huawei established Shenzhen Hisi Semiconductor Co., LTD on the basis of ASIC design Center, which is what we often say now – “Huawei Hisi”.

Huawei’s Kirin chip is not available for sale, so as of May 2019, huawei phones are the only devices available to experience the performance of Huawei’s chip. The speed at which Huawei’s chip design capabilities are improving is remarkable. Starting with the Kirin 970, Huawei brought high-performance dedicated neural network chip NPU into SoC.

Huawei Mate 40 Pro 4G Netcom and Huawei P50 Pro use 8-core Kirin 9000 ([email protected] + [email protected] + [email protected]). HUAWEI P40 uses 8-core HUAWEI Kirin 990 5G(Kirin 990 5G) (2Cortex-A76 Based 2.86GHz + 2Cortex-A76 Based 2.36GHz + 4Cortex-A55 1.95GHz). Huawei P50 uses snapdragon 888 4G with eight cores ([email protected] + [email protected] + 4*[email protected]).

chip

When it comes to chips, we have to face a soul torture: “Is kirin chip made in China? “

To return to this question, we must first understand the semiconductor production process.

Semiconductor chip production is mainly divided into IC (Integrated Circuit) design, IC manufacturing, IC sealing and testing three links and design, wafer manufacturing, EDA tools, chip raw materials, packaging, testing, equipment seven sections.

  • IC design mainly carries out logic design and rule making according to the design purpose of the chip, and makes masks according to the design drawing for subsequent photolithography steps.
  • IC manufacturing enables the chip circuit diagram to be transferred from the mask to the silicon chip, and to perform the predetermined chip functions, including photolithography, etching, ion implantation, film deposition, chemical mechanical grinding and other steps.
  • IC encapsulation test to complete the chip packaging and performance, function test, is the last process before product delivery.

Chip making is a complicated process. If we only talk about the real link, Kylin is just one link, and the chip is not pure domestic. If we talk about the integrity of a certain link, the real design has its own thing.

Kirin mainly develops SOC based on RISC architecture of ARM. The so-called SOC is like Lenovo’s computer design, which integrates some functional chips together, including CPU, GPU, flash memory, baseband and so on. And putting those cores together requires a lot of design power in itself.

In the case of huawei Kirin 960 above, the yellow part is the core that Huawei cannot design. Huawei can already develop its own GPU for kirin 985. Under the large SOC framework, this kind of design ability, many companies can be improved in a short time, the real test of chip design ability is the core level of micro architecture design.

There are only a handful of domestic chip designers with this capability, with Huawei and LoongSon leading the pack.

What is a chip?

Chip, the main raw material is the most abundant and cheapest silicon dioxide. To understand why the raw material is silica let’s review two concepts:

  • conductor
  • semiconductor

Obviously, straight men like conductors don’t have much to deal with, so wires are still copper today, and insulators have a similar fate.

The ambiguous character of semiconductor is the most easy to get into trouble, so the industry related to electronic equipment basically belongs to the semiconductor industry, such as chip, radar. The chip is the heart of a computer, and its most basic units are black and white zeros and ones.

After calculations, the scientists used silicon as the base material for semiconductors. Silicon has four electrons in its outer shell, so if a solid is made up of 100 silicon atoms, its full orbital is packed with 400 electrons. In this case, ten of the silicon atoms are replaced by ten boron atoms, a trivalent element that only has three electrons in its outer shell, so the solid has ten vacancies in its full orbital. This is the equivalent of leaving a few empty seats on a crowded bus, allowing the electrons to move around. This is called a P-type semiconductor.

Similarly, if you replace 10 silicon atoms with 10 phosphorus atoms, you have five electrons in the outer shell, so you have 10 more electrons in the full orbital. The equivalent of a packed bus with 10 people hanging outside, these people are very easy to get off the bus, this is called n-type semiconductor.

Now what happens if you put PN and PN together face to face? Those extra electrons in the N-type must go to the p-type vacancies until the electric field equals.This is known as the PN junction. (GIF from Yun Zhang’s blog post on Sciencenet)

At this time add a forward voltage, n-type semiconductor those extra electrons will continue to run to the P-type semiconductor vacancy, the movement of electrons is the current, then the PN junction is conductive; A reverse voltage is applied, and the P-type semiconductor pumps electrons to the N-type semiconductor, which is already loaded with extra electrons. The extra electrons boost the electric field until the applied voltage is offset, and the electrons stop moving, so the PN junction is non-conductive.

Chip making

1. Chip design

The design domain of the chip industry refers to all the processes from specification formulation to architecture design to tape-out. All of the processes leading up to the production of a chip in a wafer fab belong to the design domain:

  • Fabless or Design House (Huawei Hsi, Unigron, ZTE Microelectronics, Bitmain, Cambrian, Huidian technology, All Chi, Qualcomm, Broadcom, etc.) is a company that only designs chips and has no other manufacturing, packaging, or testing business.
  • IDM (Integrated Device Manufacture), Silanwei (Korea), Intel (U.S.), Samsung (Korea), Hynix (Korea), and STMICROELECTRONICS (Italy) have both chip and wafer manufacturing businesses.

Wafer manufacturing

In the chip industry, companies that manufacture only wafers are called foundries.

By slicing a single crystal silicon cylinder, you get a round silicon wafer, hence the name “wafer”.

The general process of wafer processing:

  • The wafer is first coated with a light-sensitive material that melts at the sight of light, and that’s what we’re used to hearing about lithography, which uses very fine light to carve patterns into the light-sensitive material, exposing the wafer underneath.
  • The exposed wafer is then flushed with something like plasma to carve grooves in a device called an etching machine.
  • Then ion implantation machine is used to add phosphorus elements in the groove, heat annealing treatment, get a pile of N-type semiconductor; Sprinkle boron on an ion injector and you have a P-type semiconductor.

The squares on the wafer above are chips, and one wafer can make more than one chip. When you zoom in on the chip, you see piles and piles of circuits.

Why not make the chip bigger? Wouldn’t that allow more circuitry to be installed?

  • One is cost: for a 300mm diameter wafer, the 16nm process can make 100 chips, and the 10nm process can make 210 chips, thus cutting the price in half.
  • Two is the performance problem: the wiring of the large chip is longer than the small chip, so the delay is more obvious, and the driving current is much larger, which leads to the overall design is more bloated, and the performance will suffer.

3. EDA tools

EDA is Electronic Design Automation (Electronic design automation) English abbreviation. EDA tool refers to the use of computer aided design software, to complete the vlSI chip functional design, synthesis, verification, physical design and other processes of the design. In the chip industry, the enterprise that provides EDA tools is called EDA design service provider.

At present, cadence, Synopsys and Mentor, the big three EDA tool manufacturers, monopolize the vast majority of the market share, and many other EDA manufacturers are in the shadow of the big three, struggling to survive.

4. Chip raw materials

Chip production requires a large number of raw materials, such as silicon wafers and photoresist photoresist, among which the largest demand is silicon wafers, silicon wafers accounted for the highest proportion of chip manufacturing materials, up to 37%. Silicon wafers are mainly made of silicon, which is judged by its purity. If there is a pile of impurities between the silicon atoms, it is hard for electrons to move smoothly between full and empty orbitals. The higher the purity, the harder it is to manufacture. High purity silicon, which requires 99.9999 percent for solar power, is made in China, which makes more than half the world’s silicon. The electronic-grade high purity silicon used in the chip, which requires 99.99999999999% (stop counting, 11 nines), was almost entirely imported until 2018, when Xinhua, a company based in Jiangsu province, mass-produced it.

5. Packaging

Chip packaging, in its simplest form, involves placing bare chips of integrated circuits produced by Foundry on a load-bearing substrate, pulling out pins, and securing them into a single package.

Test 6.

Test includes CP test, FT test and so on, including chip function test, reliability test, aging test and so on.

The lowest technical difficulty in the chip industry is testing and packaging, which has no big gap between domestic and foreign countries.

7. The equipment

The equipment in the chip industry mainly includes the photolithography machine and etching machine needed in the wafer manufacturing process, and the ATE testing base required in the testing process.

Asml is the only high-end lithography machine manufacturer in the world. Each machine costs at least $100 million and the production volume is not high. Whoever buys asML’s lithography machine first, whether it is TSMC, Samsung or Intel, will be the first to have the 7nm process.

Only 12 units were produced in 2017, 24 units in 2018, all of which have already been snapped up by TSMC, Samsung and Intel, and 40 units are forecast for 2019, which is easy to get stuck on:

  • First: Intel owns 15% of ASML, TSMC has 5% and Samsung has 3%. Sometimes, money is not everything.
  • Second, the US has a Wassenaar agreement where sensitive technology cannot be sold and China, NORTH Korea, Iran and Libya are all restricted countries.

Chinese etch machines are much better than photoresist machines, 16nm etch machines are already in mass production, 7-10nm etch machines are also on the road, so there are not many restrictions on the US etch machines.

Ion implantation machine is relatively poor, 70% of the market share is American Applied Materials Company, in August 2017 finally had the first domestic commercial machine, the level is not evaluated.

The “glue-developing machine” used to paint sensitive materials took 90% of the market. Even photoresist these auxiliary materials, but also almost shinetsu Japan, the United States, such as tao monopoly.

Why is the lithography machine so hard to crack? At the end of the day, the final competition for equipment is material. For example, the engine, the pearl in the crown of industry, its core technology is simply that the turbine blade is not strong enough, and the accelerator will fall apart if it is pressed hard. Whether it is an aerospace engine, an aero engine or a gas turbine, as long as the word “machine” is brought, our waist rod is a little soft. Quoting someone else’s analysis of the material:

Materials technology, on the other hand, costs money, time and sometimes luck. Take engines: the metal rhenium, which is mixed with nickel to make turbine blades blow up in the sky. The world’s proven reserves of rhenium are around 2,500 tons, mostly in Europe and America, 70% of which is used to make engine turbine blades, a strategic material that has no problem being banned by the American empire. A few years ago in Shaanxi discovered a reserves of 176 tons of rhenium mine, can be the geomechanical music, immediately fight to burn money, the helplessness and pain of life has improved in recent years. Rare earth permanent magnets, which are magnets made of rare earths, are very useful because they stay magnetic. Most of the high-grade rare earth minerals are found in China, so the earth technology related to “magnetism”, such as nuclear fusion, dark matter detection in space, is better than the US. It is said that the earthworks embargo on the Us emperor a few years ago, forcing the US emperor to exchange rhenium, plus shaanxi and Anhui dig out that rhenium, J20 engine is some. The key core materials, there are about 130 of them in the world, which means that if you have 130 of them, you can build any device that exists in the world, and make anything that exists.

Humanity’s core technologies, to some extent, refer to these 130 materials, of which 32 percent are completely blank in China and 52 percent are imported. In high-end machine tools, rockets, large aircraft, engines and other cutting-edge fields, the proportion is far from the same. Although parts are made in China, 95% of the equipment used to produce parts is imported. These are not old news, but data released by the Ministry of Industry and Information Technology in July 2018 are still fresh.

Take a look at the whole link of the domestic semiconductor industry:

conclusion

This paper summarizes the concepts of CPU, instruction set, architecture and chip. It also introduces and differentiates their concepts in detail: instruction set is equivalent to function head, microarchitecture is equivalent to function body, the white point of microarchitecture is THE CPU hardware drawing, how many transistors are designed here, how to connect the transistors there, and chip is the physical implementation of setting design. ARM architecture and chip design process and key technologies are introduced in detail.

reference

  • Read | semiconductor lithography machine observation
  • History of the most complete semiconductor industry chain panorama
  • Gold from Sand: Semiconductor Chips (Abridged Version)

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